A method and system for reducing resonance in an electrical system is disclosed. The method includes electrically disconnecting pre-existing capacitance on a chip as necessary.
Method and System for Reducing Resonance in an Electrical System
Disclosed is a method and system for reducing resonance in an electrical system without dissipating additional power and ensuring low area overhead.
Current methods for suppressing resonance in a circuit include use of a band pass filter to determine when a system power supply is near resonance. Further, the band pass filter is also used to determine when a bank of transistors should be turned on to draw DC current and dampen the resonance. Similarly, a CMOS microprocessor chip and package anti-resonance apparatus utilize a band-pass filter to turn on transistors that shunt current (VDD-GND) to dampen the resonance. This results in an area overhead as current dissipation portions occupy chip area. Further, extra power is utilized to suppress resonance.
The method and system disclosed reduces resonance in an electrical system without dissipating additional power while incurring only low area overhead. As a result, extra chip costs are avoided. In order to minimize resonance effects, an Anti-Resonance Methodology (ARM) disclosed herein dynamically varies capacitance of a system entering resonance, typically as a result of drawing transient current (for example, by way of switching events) at or near the system's natural resonant frequency.
Fig. 1 illustrates a basic two state anti-resonance detection circuit. As shown in Fig.1, when resonance is detected, the resonance detection circuit outputs a state "1". Consequently, the PFET is turned off and the capacitance (C) is disconnected from the system. When a resonance is not detected, the PFET remains in the on state, and the capacitance (C) remains connected to the system.
Figure 1
Fig. 2 illustrates an ARM circuit for adding and removing capacitance with a switch. Examples of switches include a variable resistor topology switch, a multiplexer topology switch, a simple NMOS or PMOS pass gate transistor, and a transmission gate. A default ARM circuit setting connects maximum capacitance to the system, as a system having more capacitance generally reduces overall power supply voltage compression regardless of whether or not the system is running at resonant frequency.
1
As shown in Fig. 2, if a certain level of capacitance and transient current draw results in an unacceptably large resonance, some amount of capacitance is removed from the system. The capacitance remains removed as long as the system power-supply voltages remain outside of specified bounds. Subsequently, when the system power-supply voltages return within the specified bounds (for example, as a result of operating frequency changes), the capacitance is re-connected to the system until the maximum level of capacitance is restored.
Figure 2
Fig. 3 shows the results of a te...