Method for improving Node Nitride Product Thickness (01-Feb-2010)
IP.com Prior Art Database Disclosure
(Source: IPCOM)
Disclosure Number
IPCOM000192757D
dated
01-Feb-2010
Originally published in Prior Art Database
Disclosed by:
IBM
Country:
Undisclosed
Disclosure File:
5 pages / 136.0 KB / English (United States)
Incoming product lots vary in DT trench surface area& wafer quantity resulting in thickness variation of generically deposited node nitride leading to DT capacitance differences Problem more critical for 12S (currently in manufacturing) Expecting to get worst with several ASIC RITs with low volume Proposed a solution (Solution B below) by calculating an Effective Furnace Loading (EFL) for each batch of wafers ready for deposition and selecting a recipe from a list of recipes vs EFL.
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Method for improving Node Nitride Product Thickness
This disclosure describes how to improve wafer to wafer, run to run and product to product thickness uniformity of LPCVD processes in
vertical furnaces.
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(Source: IPCOM)
(Source: IPCOM)
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