Method and System for Building a Self-Generating Test Program for Functional Verification of Microprocessor (02-Feb-2010)

Method and System for Building a Self -Generating Test Program for Functional

Verification of Microprocessor

Disclosed is a method and system for building a self-generating test program for functional verification of a microprocessor. The verification of the functionality of execution units of the microprocessor involves testing multiple instructions implemented in the microprocessor. Typically, a test program is built and simulated in order to verify the functionality of architecture of a microprocessor.

The method and system disclosed herein, categorizes instructions implemented in the microprocessor based on an instruction format and nature of operation associated with the microprocessor. The instructions belonging to an instruction format are categorized into an instruction group. Thereafter, an instruction table is created by appending the categorized instructions in multiple instruction groups. An instruction belonging to an instruction format may be replaced with any other instruction belonging to the same instruction format. An exemplary instruction table including multiple instruction groups is depicted in Fig. 1.

The instruction table contains an "OR" mask corresponding to each instruction in an instruction group. An "OR" Mask includes information regarding an opcode and an extended opcode of a

particular instruction. An opcode field may be modified during execution of a test program. The

opcode field of the instruction may be replaced from the instruction table during execution of the test program to generate new and valid instructions. However, during the generation of new instructions, register values and operands corresponding to the test program are preserved.

1

Figure 1

The method and system then builds a set of test programs and stores information corresponding to the set of test programs in a test program information table. Information corresponding t...