| No | Document | Title | Date |
|---|---|---|---|
| 1 |
US 7676709 B2
patent document
|
Self-test output for high-density BIST | 09-Mar-2010 |
| 2 |
US 7676698 B2
patent document
|
Apparatus and method for coupling a plurality of test access ports to external test and debug facility | 09-Mar-2010 |
| 3 |
US 7676697 B2
patent document
|
Using a delay line to cancel clock insertion delays | 09-Mar-2010 |
| 4 |
US 7676048 B2
patent document
|
Graphic equalizers | 09-Mar-2010 |
| 5 |
US 7676043 B1
patent document
|
Audio bandwidth expansion | 09-Mar-2010 |
| 6 |
US 7675888 B2
patent document
|
Orthogonal frequency division multiplexing access (OFDMA) ranging | 09-Mar-2010 |
| 7 |
US 7675706 B2
patent document
|
Methods and apparatus for proximity detection of hard disk drive read heads | 09-Mar-2010 |
| 8 |
US 7675704 B2
patent document
|
Magnetoresistive head preamplifier circuit with programmable input impedance | 09-Mar-2010 |
| 9 |
US 7675551 B1
patent document
|
Method and apparatus obtaining color values for a digital camera | 09-Mar-2010 |
| 10 |
US 7675368 B2
patent document
|
Hybrid stochastic gradient based digitally controlled oscillator gain KDCO estimation | 09-Mar-2010 |
| 11 |
US 7675345 B2
patent document
|
Low-leakage level-shifters with supply detection | 09-Mar-2010 |
| 12 |
US 7675315 B2
patent document
|
Output stage with low output impedance and operating from a low power supply | 09-Mar-2010 |
| 13 |
US 7675272 B2
patent document
|
Output impedance compensation for linear voltage regulators | 09-Mar-2010 |
| 14 |
US 7675152 B2
patent document
|
Package-on-package semiconductor assembly | 09-Mar-2010 |
| 15 |
US 7674707 B2
patent document
|
Manufacturable reliable diffusion-barrier | 09-Mar-2010 |
| 16 |
US 7674682 B2
patent document
|
Capacitor integration at top-metal level with a protective cladding for copper surface protection | 09-Mar-2010 |
| 17 |
US 7673294 B2
patent document
|
Mechanism for pipelining loops with irregular loop control | 02-Mar-2010 |
| 18 |
US 7673120 B2
patent document
|
Inter-cluster communication network and heirarchical register files for clustered VLIW processors | 02-Mar-2010 |
| 19 |
US 7673119 B2
patent document
|
VLIW optional fetch packet header extends instruction set space | 02-Mar-2010 |
| 20 |
US 7673101 B2
patent document
|
Re-assigning cache line ways | 02-Mar-2010 |
| 21 |
US 7673091 B2
patent document
|
Method to hide or reduce access latency of a slow peripheral in a pipelined direct memory access system | 02-Mar-2010 |
| 22 |
US 7673076 B2
patent document
|
Concurrent read response acknowledge enhanced direct memory access unit | 02-Mar-2010 |
| 23 |
US 7672102 B2
patent document
|
Electrical overstress protection | 02-Mar-2010 |
| 24 |
US 7671667 B2
patent document
|
Rapidly activated current mirror system | 02-Mar-2010 |
| 25 |
US 7671663 B2
patent document
|
Tunable voltage controller for a sub-circuit and method of operating the same | 02-Mar-2010 |
| 26 |
US 7671633 B2
patent document
|
Glitch free 2-way clock switch | 02-Mar-2010 |
| 27 |
US 7671445 B2
patent document
|
Versatile system for charge dissipation in the formation of semiconductor device structures | 02-Mar-2010 |
| 28 |
US 7671428 B2
patent document
|
Methods for depositing, releasing and packaging micro-electromechanical devices on wafer substrates | 02-Mar-2010 |
| 29 |
US 7671408 B2
patent document
|
Vertical drain extended MOSFET transistor with vertical trench field plate | 02-Mar-2010 |
| 30 |
US 7670952 B2
patent document
|
Method of manufacturing metal silicide contacts | 02-Mar-2010 |
| 31 |
US 7670920 B2
patent document
|
Methods and apparatus for forming a polysilicon capacitor | 02-Mar-2010 |
| 32 |
US 7670917 B2
patent document
|
Semiconductor device made by using a laser anneal to incorporate stress into a channel region | 02-Mar-2010 |
| 33 |
US 7670913 B2
patent document
|
Method for forming ultra-thin low leakage multiple gate devices using a masking layer over the semiconductor substrate | 02-Mar-2010 |
| 34 |
US 7670892 B2
patent document
|
Nitrogen based implants for defect reduction in strained silicon | 02-Mar-2010 |
| 35 |
US 7670890 B2
patent document
|
Silicide block isolated junction field effect transistor source, drain and gate | 02-Mar-2010 |
| 36 |
US 7670888 B2
patent document
|
Low noise JFET | 02-Mar-2010 |
| 37 |
US 7669313 B2
patent document
|
Method for fabricating a thin film resistor semiconductor structure | 02-Mar-2010 |
| 38 |
US 7669243 B2
patent document
|
Method and system for detection and neutralization of buffer overflow attacks | 23-Feb-2010 |
| 39 |
US 7669109 B2
patent document
|
Hardware-efficient low density parity check code for digital communications | 23-Feb-2010 |
| 40 |
US 7669099 B2
patent document
|
Optimized JTAG interface | 23-Feb-2010 |
| 41 |
US 7668564 B2
patent document
|
Slow uplink power control | 23-Feb-2010 |
| 42 |
US 7668321 B2
patent document
|
Automatic power foldback for audio applications | 23-Feb-2010 |
| 43 |
US 7668313 B2
patent document
|
Recipient-encrypted session key cryptography | 23-Feb-2010 |
| 44 |
US 7668265 B2
patent document
|
Ultra wideband interference cancellation for orthogonal frequency division multiplex transmitters by protection-edge tones | 23-Feb-2010 |
| 45 |
US 7668251 B2
patent document
|
Scalable post-channel estimate phase corrector, method of correction and MIMO communication system employing the corrector and method | 23-Feb-2010 |
| 46 |
US 7668248 B2
patent document
|
High-performance LDPC coding for digital communications in a multiple-input, multiple-output environment | 23-Feb-2010 |
| 47 |
US 7668247 B2
patent document
|
Methods and systems for performing an overlap-and-add operation | 23-Feb-2010 |
| 48 |
US 7668243 B2
patent document
|
Audio and video clock synchronization in a wireless network | 23-Feb-2010 |
| 49 |
US 7668232 B2
patent document
|
System and method to determine power cutback in communication systems | 23-Feb-2010 |
| 50 |
US 7668224 B2
patent document
|
Encoding for digital communications in a multiple-input, multiple-output environment | 23-Feb-2010 |