| No | Document | Title | Date |
|---|---|---|---|
| 201 |
US 2011/0291274 A1
patent application
|
Method of manufacturing a semiconductor device
A method of manufacturing a semiconductor device is disclosed. One embodiment provides a carrier. Semiconductor chips are placed over the carrier. The semiconductor chips include contact elements. A polymer...
|
01-Dec-2011 |
| 202 |
US 2011/0293104 A1
patent application
|
Audio communication device and method using fixed echo cancellation filter coefficients
Methods, apparatuses, systems, and software are disclosed for providing a phone or other audio communication device with a fixed-path acoustic echo cancellation feature that compensates for a fixed-path...
|
01-Dec-2011 |
| 203 |
US 2011/0294289 A1
patent application
|
Method for Producing a Connection Electrode for Two Semiconductor Zones Arranged One Above Another
A method for producing a connection electrode for a first and second adjacent and complementarily doped semiconductor zones includes a step of producing a trench extending through the first semiconductor zone...
|
01-Dec-2011 |
| 204 |
US 2011/0294238 A1
patent application
|
Semiconductor wafer with electrically connected contact and test areas
The invention relates to an arrangement of contact areas and test areas on patterned semiconductor chips. The contact areas and the test areas are electrically connected to one another via a conduction web....
|
01-Dec-2011 |
| 205 |
US 8067796 B2
patent document
|
Semiconductor component with cell structure and method for producing the same
A semiconductor component comprises a semiconductor body comprising a first component electrode arranged on one of the surfaces of the semiconductor body, a second component electrode arranged on one of the...
|
29-Nov-2011 |
| 206 |
US 8067859 B2
patent document
|
Reverse polarity protection for MOSFETs
The invention relates to a control circuit and a corresponding method for controlling MOSFETs coupled to the control circuit. The MOSFETs are coupled to a load to couple the load to a power supply, or the...
|
29-Nov-2011 |
| 207 |
US 8067958 B2
patent document
|
Mitigating side effects of impedance transformation circuits
Implementations to mitigating side effects of impedance transformation circuits are described. In particular, mitigation circuitry may be coupled to a high impedance circuit to minimize or eliminate non-linear...
|
29-Nov-2011 |
| 208 |
US 8068885 B2
patent document
|
Method and circuit arrangement for determining a charge consumed within a period in mobile devices
A method for calculating the power consumption of a mobile device, particularly of a mobile station of a mobile radio system, in an observation period Δt based on various possible system states sk in which the...
|
29-Nov-2011 |
| 209 |
US 8069196 B2
patent document
|
Method and device for creating a starting value for a pseudorandom number generator
Method and device for creating a starting value for a pseudorandom number generator, having a reader configured to unstably read out an output value from a memory cell and a determiner configured to determine...
|
29-Nov-2011 |
| 210 |
US 8067841 B2
patent document
|
Semiconductor devices having a resin with warpage compensated surfaces
A semiconductor device including: a die pad, a die on the die pad, and resin encapsulating the die and forming an isolation thickness over the die pad, the resin including a mounting aperture and a major...
|
29-Nov-2011 |
| 211 |
US 8068567 B2
patent document
|
Phase and frequency control of an ODFM receiver by means of pilot phase-value estimation
A common phase value of pilot subcarriers of a received data symbol (n) is estimated and used for correcting the phase of all subcarriers of the data symbol, wherein, with a time-variant frequency of the local...
|
29-Nov-2011 |
| 212 |
US 8069198 B2
patent document
|
Integrated circuit having a filter circuit
A filter circuit arrangement comprising a circuit configuration having non-linear transmission characteristics for equalizing an input signal is disclosed. In one embodiment, the circuit configuration having...
|
29-Nov-2011 |
| 213 |
US RE42980 E1
patent document
|
Method for applying a resist layer, uses of adhesive materials, and adhesive materials and resist layer
A method in which a resist layer is applied to a base layer is disclosed. The resist layer includes an adhesive material, and the adhesive force of the adhesive material decreases or increases during an...
|
29-Nov-2011 |
| 214 |
US 8067290 B2
patent document
|
Bipolar transistor with base-collector-isolation without dielectric
The disclosed invention provides a method for the fabrication of a bipolar transistor having a collector region comprised within a semiconductor body separated from an overlying base region by one or more...
|
29-Nov-2011 |
| 215 |
US 8067808 B2
patent document
|
Apparatus of memory array using FinFETs
A memory cell includes a FinFET select device and a memory element. In some embodiments a memory cell has a contact element coupled between a surface of the fin and the memory element.
|
29-Nov-2011 |
| 216 |
US 8067287 B2
patent document
|
Asymmetric segmented channel transistors
Structures, layouts and methods of forming integrated circuits are described. In various embodiments, the current invention includes an asymmetric segmented transistor. The asymmetric segmented transistor...
|
29-Nov-2011 |
| 217 |
US 8067135 B2
patent document
|
Metrology systems and methods for lithography processes
Metrology systems and methods for lithography processes are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes providing a mask having a plurality of corner rounding test...
|
29-Nov-2011 |
| 218 |
US 2011/0284970 A1
patent application
|
Transistor Device and Methods of Manufacture Thereof
Methods of forming transistor devices and structures thereof are disclosed. A first dielectric material is formed over a workpiece, and a second dielectric material is formed over the first dielectric material....
|
24-Nov-2011 |
| 219 |
US 2011/0289377 A1
patent application
|
Systems and methods for secure interrupt handling
The invention relates to systems for secure interrupt handling, a method for verifying a priority of a winning service request node and a method and an apparatus for verifying integrity of service requests. In...
|
24-Nov-2011 |
| 220 |
US 2011/0285030 A1
patent application
|
Method for producing chip packages, and chip package produced in this way
A method for producing chip packages is disclosed. In one embodiment, a plurality of chips is provided. The chips each have first pads. Second connection pads are applied on the wafer, wherein each second pad...
|
24-Nov-2011 |
| 221 |
US 2011/0285033 A1
patent application
|
Chip Carrier
Electronic circuit arrangement, includes a chip and a chip carrier having a substrate and a chip contact location. At least the chip contact location is provided with a soldering layer. The chip includes a...
|
24-Nov-2011 |
| 222 |
US 8063448 B2
patent document
|
Resistive memory and method
A memory device includes a multi gate field effect transistor (MuGFET) having a fin with a contact area. A programmable memory element abuts the fin contact area.
|
22-Nov-2011 |
| 223 |
US 8063668 B2
patent document
|
Output stage, amplifier control loop and use of the output stage
An output stage includes a first transistor pair with a first conductivity type and a second transistor pair with a second conductivity type. The source connections of the first and second transistors in the...
|
22-Nov-2011 |
| 224 |
US 8064559 B2
patent document
|
Clock control of transmission-signal processing devices in mobile radio terminal devices
To support a plurality of different mobile radio standards in mobile radio terminal devices using a single system oscillator, a sampling rate converter converts the sampling rates from an input rate to an...
|
22-Nov-2011 |
| 225 |
US 8064856 B2
patent document
|
Modulation system and method for switched amplifiers
A power amplifier includes a baseband modulator configured to receive a baseband amplitude component and generate a baseband modulated pulse string, an oscillator configured to receive a baseband phase...
|
22-Nov-2011 |
| 226 |
US 8062928 B2
patent document
|
Semiconductor device having a semiconductor chip, and method for the production thereof
A semiconductor device having a semiconductor chip having an active surface with flip-chip contacts and a passive surface is disclosed. In one embodiment, the flip-chip contacts are surrounded by an...
|
22-Nov-2011 |
| 227 |
US 8061621 B2
patent document
|
Integrated circuit device including tunable substrate capacitors
An integrated circuit device and method. A substrate having contacts has a plurality of capacitors thereon. A plurality of fusible links selectively connect the plurality of capacitors to one another and...
|
22-Nov-2011 |
| 228 |
US 8062954 B2
patent document
|
Method for manufacturing a field plate in a trench of a power transistor
A method for manufacturing a field plate in a trench of a power transistor in a substrate of a first conductivity type is disclosed. The trench is formed in a first main surface of the substrate.
|
22-Nov-2011 |
| 229 |
US 8064561 B2
patent document
|
Determining a time interval based on a first signal, a second signal, and a jitter of the first signal
An apparatus including a circuit configured to determine a jitter of a first signal, and to determine a time interval between a feature in a second signal and a feature in the first signal based on the...
|
22-Nov-2011 |
| 230 |
US 8063633 B2
patent document
|
Magnetoresistive magnetic field sensor structure
A magnetic field sensor structure including a first magnetoresistive element in a spin-valve arrangement with a first reference layer structure with a first reference magnetization direction and a second...
|
22-Nov-2011 |
| 231 |
US 8064186 B2
patent document
|
Method of manufacturing capacitive elements for a capacitive device
A method of manufacturing capacitive elements for a capacitive device which comprises one or more layers is provided. At least one layer is etched from a first surface to a second surface thereof to form two...
|
22-Nov-2011 |
| 232 |
US 8064230 B2
patent document
|
System and method for power conversion
A system and method for operating power supplies. A method comprises altering a current sense (CS) signal, turning off a switch of the converter in response to a determining that the CS signal is greater than...
|
22-Nov-2011 |
| 233 |
US 8064557 B1
patent document
|
Programmable synchronization unit for a signal receiver
A programmable synchronizing unit for a signal receiver has a received data memory for buffering received data, a correlation value data memory for storing correlation values, a data path for correlating the...
|
22-Nov-2011 |
| 234 |
US 8063632 B2
patent document
|
Method and apparatus for defined magnetizing of permanently magnetizable elements and magnetoresistive sensor structures
A method of magnetizing a permanently magnetizable element associated with a magnetic field sensor structure includes generating a test magnetic field penetrating the magnetic field sensor structure and the...
|
22-Nov-2011 |
| 235 |
US 8064862 B2
patent document
|
Antenna diversity method with fallback and weighting
In a radio communication station having N antennas an antenna diversity system and a gain controllable amplifier the gain of the gain controllable amplifier is set by using a first antenna, the signal levels of...
|
22-Nov-2011 |
| 236 |
US 8062971 B2
patent document
|
Dual damascene process
Structures and methods of forming metallization layers on a semiconductor component are disclosed. The method includes etching a metal line trench using a metal line mask, and etching a via trench using a via...
|
22-Nov-2011 |
| 237 |
US 8063419 B2
patent document
|
Integrated circuit having compensation component
An integrated circuit and component is disclosed. In one embodiment, the component is a compensation component, configuring the compensation regions in the drift zone in V-shaped fashion in order to achieve a...
|
22-Nov-2011 |
| 238 |
US 8063508 B2
patent document
|
Power supply scheme for reduced power compensation
A power control system is described that reuses current from segregated circuits of the mobile device. In some embodiments, the segregated circuits (or “sections”) can be “stacked” in series (with respect to...
|
22-Nov-2011 |
| 239 |
US 8064699 B2
patent document
|
Method and device for ascertaining feature vectors from a signal
A signal is used to form intermediate feature vectors which are subjected to high-pass filtering. The high-pass-filtered intermediate feature vectors have a respective prescribed addition feature vector added...
|
22-Nov-2011 |
| 240 |
US 8065137 B2
patent document
|
Apparatus and method for identifying signal frames as audio signal frames
A system and apparatus for establishing whether a received signal frame is an audio signal frame is disclosed. In one embodiment, the system includes a predetermined position in an audio signal frame containing...
|
22-Nov-2011 |
| 241 |
US 8063406 B2
patent document
|
Semiconductor device having a polysilicon layer with a non-constant doping profile
Various illustrative embodiments of methods for manufacturing a semiconductor device are described. These methods may include, for example, forming a first polysilicon layer above a substrate, wherein the first...
|
22-Nov-2011 |
| 242 |
US 8063449 B2
patent document
|
Semiconductor devices and methods of manufacture thereof
Semiconductor devices and methods of manufacture thereof are disclosed. In a preferred embodiment, a method of manufacturing a semiconductor device includes providing a semiconductor wafer, forming at least one...
|
22-Nov-2011 |
| 243 |
US 8063469 B2
patent document
|
On-chip radio frequency shield with interconnect metallization
Structure and method for fabricating a system on chip with an on-chip RF shield including interconnect metallization is described. In one embodiment, the system on chip includes an RF circuitry disposed on a...
|
22-Nov-2011 |
| 244 |
US 8065517 B2
patent document
|
Method and system for transferring information to a device
A system and method for transferring information include generating a public/private key pair for programming equipment and sending the programming equipment public key to a certificate authority. A programming...
|
22-Nov-2011 |
| 245 |
US 2011/0278680 A1
patent application
|
Strained Semiconductor Device and Method of Making the Same
In a method for forming a semiconductor device, a gate electrode is formed over a semiconductor body (e.g., bulk silicon substrate or SOI layer). The gate electrode is electrically insulated from the...
|
17-Nov-2011 |
| 246 |
US 2011/0278667 A1
patent application
|
Semiconductor component arrangement and method for producing thereof
A semiconductor component arrangement and method for producing thereof is disclosed. One embodiment provides at least one power semiconductor component integrated in a semiconductor body and at least one logic...
|
17-Nov-2011 |
| 247 |
US 2011/0281405 A1
patent application
|
Method of fabricating a semiconductor device and semiconductor device
A method of fabricating a semiconductor device and semiconductor device is provided. The method provides a first layer. The first layer includes through-holes. At least one semiconductor chip is provided. The...
|
17-Nov-2011 |
| 248 |
US 2011/0278730 A1
patent application
|
Semiconductor Devices and Structures Thereof
A structure having air gaps between interconnects is disclosed. A first insulating material is deposited over a workpiece, and a second insulating material having a sacrificial portion is deposited over the...
|
17-Nov-2011 |
| 249 |
US 8058927 B2
patent document
|
Amplifier modulation method and apparatus
A signal is modulated by generating a pulse-width modulation signal and applying the pulse-width modulation signal to an input of a switched-mode amplifier. An output of the amplifier is coupled to a filter...
|
15-Nov-2011 |
| 250 |
US 8058917 B2
patent document
|
Compensation of phase lock loop (PLL) phase distribution caused by power amplifier ramping
Disclosed herein are techniques, systems, and methods relating to compensation of phase disturbances of a phase lock-loop during power ramp up or down of a power amplifier. More specifically, a phase lock-loop...
|
15-Nov-2011 |
| 251 |
US 8057094 B2
patent document
|
Power semiconductor module with temperature measurement
A power semiconductor module with temperature measurement is disclosed. One embodiment provides a conductor having a first end and a second end. The second end is thermally coupled at a substrate. A device...
|
15-Nov-2011 |
| 252 |
US 8058176 B2
patent document
|
Methods of patterning insulating layers using etching techniques that compensate for etch rate variations
Methods of forming integrated circuit devices include forming an integrated circuit substrate having an electrically insulating layer thereon and forming a mask layer pattern having at least first and second...
|
15-Nov-2011 |
| 253 |
US 8058866 B2
patent document
|
Off-center angle measurement system
An angle measurement system including a magnet coupled to a rotating member and adapted to provide a magnetic field which rotates with the rotating member about a rotational axis of the rotating member, and an...
|
15-Nov-2011 |
| 254 |
US 8058111 B2
patent document
|
Integrated circuit arrangement comprising a pin diode, and production method
An integrated circuit arrangement includes a pin photodiode and a highly doped connection region of a bipolar transistor. A production method produces an intermediate region of the pin diode with a large depth...
|
15-Nov-2011 |
| 255 |
US 8058870 B2
patent document
|
Methods and systems for magnetic sensing
One embodiment relates to a method of manufacturing a magnetic sensor. In the method, an engagement surface is provided. A magnet body is formed over the engagement surface by gradually building thickness of a...
|
15-Nov-2011 |
| 256 |
US 8059114 B2
patent document
|
Organic light emitting diode driver
Pulse width modulation (PWM) of a drive current to an organic light emitting diode (OLED) is performed by a circuit subjected to corresponding signaling.
|
15-Nov-2011 |
| 257 |
US 8060800 B2
patent document
|
Evaluation circuit and method for detecting and/or locating faulty data words in a data stream Tn
An evaluation circuit and method for detecting faulty data words in a data stream is disclosed. In one embodiment the evaluation circuit according to the invention includes a first linear automaton circuit and...
|
15-Nov-2011 |
| 258 |
US 8060757 B2
patent document
|
Decryption and encryption during write accesses to a memory
An encryption part or a decryption part of an encryption/decryption apparatus or a part common to both parts is used both for encryption and decryption of a datum to be stored and the encrypted memory content...
|
15-Nov-2011 |
| 259 |
US 8058993 B2
patent document
|
Capacitive detection systems and methods
The invention is related to capacitive sensing and detection systems and methods. In one embodiment, a capacitive sensor system comprises a first electrode and a second electrode forming a first capacitive...
|
15-Nov-2011 |
| 260 |
US 8059375 B2
patent document
|
Circuit arrangement and method for the protection of a circuit against electrostatic discharges
Illustrative apparatuses and methods for electrostatic discharge protection are described in which the frequency of a voltage received at a first circuit node is filtered to generate a filtered voltage, one or...
|
15-Nov-2011 |
| 261 |
US 8060025 B2
patent document
|
Filter arrangement and method for filtering a signal
A filter arrangement comprises a first impedance, a second impedance and a subtractor. The first impedance comprises a first connection connected to an input of the filter arrangement and has a first resonant...
|
15-Nov-2011 |
| 262 |
US 8058098 B2
patent document
|
Method and apparatus for fabricating a plurality of semiconductor devices
A method includes the steps of providing a carrier comprising a plurality of cavities; placing at least one semiconductor element into each of the cavities; filling the plurality of cavities with a packaging...
|
15-Nov-2011 |
| 263 |
US 2011/0272761 A1
patent application
|
Semiconductor device and manufacturing method thereof
A semiconductor device includes a source metallization, a source region of a first conductivity type in contact with the source metallization, a body region of a second conductivity type which is adjacent to...
|
10-Nov-2011 |
| 264 |
US 2011/0272735 A1
patent application
|
Semiconductor component with a trench edge termination
A semiconductor component includes a semiconductor body having a first surface and a second surface, and having an inner region and an edge region. The semiconductor component further includes a pn-junction...
|
10-Nov-2011 |
| 265 |
US 8053280 B2
patent document
|
Method of producing multiple semiconductor devices
A method for producing multiple semiconductor devices. An electrically conductive layer is applied onto a semiconductor wafer. The semiconductor wafer is structured to produce multiple semiconductor chips. The...
|
08-Nov-2011 |
| 266 |
US 8053890 B2
patent document
|
Microchip assembly including an inductor and fabrication method
An assembly includes a substrate, a chip mounted on the substrate, a voltage controlled oscillator circuit including an inductor and further circuit elements. The inductor is mounted on or in the substrate, and...
|
08-Nov-2011 |
| 267 |
US 2011/0268046 A1
patent application
|
Communication network device, communication terminal, and communication resource allocation methods
A communication network device of a communication system is described comprising a transmitter configured to transmit data in a plurality of frames, wherein in each frame, a plurality of communication resource...
|
03-Nov-2011 |
| 268 |
US 2011/0269073 A1
patent application
|
Method for applying a resist layer, uses of adhesive materials, and adhesive materials and resist layer
A method in which a resist layer is applied to a base layer is disclosed. The resist layer includes an adhesive material, and the adhesive force of the adhesive material decreases or increases during an...
|
03-Nov-2011 |
| 269 |
US 2011/0270553 A1
patent application
|
Apparatus, Sensor Circuit, and Method for Operating an Apparatus or a Sensor Circuit
An apparatus is described, including: a signal processing circuit adapted to process an input signal to obtain an output signal; a sensor element for sensing a predetermined physical quantity, wherein the...
|
03-Nov-2011 |
| 270 |
US 2011/0269447 A1
patent application
|
Mobile radio communication network device, mobile terminal, and method for transmission/Reception of control information
A mobile radio communication network device is descried including a receiver configured to receive control information from a mobile terminal, wherein the receiver is configured to receive the control...
|
03-Nov-2011 |
| 271 |
US 8048734 B2
patent document
|
Bipolar transistor and method for making same
One or more embodiments of the invention relate to a method of making a heterojunction bipolar transistor, including: forming a collector layer; forming a stack of at least a second dielectric layer overlying a...
|
01-Nov-2011 |
| 272 |
US 8049515 B2
patent document
|
Silicon MEMS resonators
The invention relates to MEMS resonators. In one embodiment, an integrated resonator and sensor device includes a micro-electromechanical system (MEMS) resonator, and an anchor portion coupled to the MEMS...
|
01-Nov-2011 |
| 273 |
US 8049336 B2
patent document
|
Interconnect structure
One or more embodiments relate to a semiconductor device, comprising: a Si-containing layer; a barrier layer disposed over the Si-containing layer, the barrier layer comprising a compound including a metallic...
|
01-Nov-2011 |
| 274 |
US 8049490 B2
patent document
|
Silicon MEMS resonator devices and methods
Embodiments of the invention are related to MEMS devices and methods. In one embodiment, a MEMS device includes a resonator element comprising a magnetic portion having a fixed magnetization, and at least one...
|
01-Nov-2011 |
| 275 |
US 8049311 B2
patent document
|
Electronic component and method for its production
An electronic component includes a number of leads and at least one cooling element. The bottom surface of the cooling element is exposed and the material of the cooling element is different from the material...
|
01-Nov-2011 |
| 276 |
US 8048801 B2
patent document
|
Substrate with feedthrough and method for producing the same
A substrate with first and second main surfaces includes at least one channel extending from the first main surface to the second main surface. The at least one channel includes a first cross-sectional area at...
|
01-Nov-2011 |
| 277 |
US 8049474 B2
patent document
|
Switching converter with plural converter stages having calibrated current uptake
A switching converter according includes a control arrangement to furnish a control signal dependent on the output voltage, as well as a first and at least one second converter stage. Each converter includes an...
|
01-Nov-2011 |
| 278 |
US 2011/0258844 A1
patent application
|
Method of manufacturing a power transistor module and package with integrated bus bar
According to an embodiment of a method of manufacturing a power transistor module, the method includes mechanically fastening a first terminal, a second terminal and at least two different DC bias terminals to...
|
27-Oct-2011 |
| 279 |
US 2011/0260302 A1
patent application
|
Shielding device
One aspect of the invention relates to a shielding device for shielding from electromagnetic radiation, including a shielding base element, a shielding cover element and a shielding lateral element for...
|
27-Oct-2011 |
| 280 |
US 2011/0260307 A1
patent application
|
Integrated circuit including bond wire directly bonded to pad
An integrated circuit includes a chip including a copper bond pad metallization, and a copper bond wire including a copper ball. The copper ball is bonded directly to the copper bond pad.
|
27-Oct-2011 |
| 281 |
US 2011/0261542 A1
patent application
|
Die package
In an embodiment, a die package may be provided. The die package may include at least one first height adjusting structure, the at least one first height adjusting structure may include a first adjusting height...
|
27-Oct-2011 |
| 282 |
US 2011/0260537 A1
patent application
|
Method of balancing current supplied to a load
A method of balancing current supplied by a plurality of regulators coupled to a load includes: measuring an average load current supplied by each regulator; determining an overall average current to be shared...
|
27-Oct-2011 |
| 283 |
US 8043934 B2
patent document
|
Methods of use and formation of a lateral bipolar transistor with counter-doped implant regions under collector and/or emitter regions
A method for protecting a semiconductor circuit from electrostatic discharge is disclosed. An electrostatic discharge is received at a node. Current created by the electrostatic discharge is directed vertically...
|
25-Oct-2011 |
| 284 |
US 8044674 B2
patent document
|
Semiconductor device with thermal fault detection
A semiconductor device with a thermal fault detection is disclosed. According to one example of the invention such a semiconductor device includes a semiconductor chip including an active area. It further...
|
25-Oct-2011 |
| 285 |
US 8045937 B2
patent document
|
Digital phase feedback for determining phase distortion
A feedback loop is used to determine phase distortion created in a signal by directly extracting the phase distortion information from a feedback signal using original frequency modulation information.
|
25-Oct-2011 |
| 286 |
US 8045310 B2
patent document
|
Semiconductor device with overcurrent protection
A semiconductor device with an over-current detection feature is disclosed. According to an example of the invention the device includes: a semiconductor chip including a load current path that conducts a load...
|
25-Oct-2011 |
| 287 |
US 8046487 B2
patent document
|
Method for routing of data packets and routing apparatus
In order to be able to use a smaller routing table (4) and, thus, to reduce the costs and power consumption and to improve the performance of an IP router, it is proposed to extract a destination address...
|
25-Oct-2011 |
| 288 |
US 8044460 B2
patent document
|
Electronic device with connecting structure
A connecting structure for an electronic device includes an edge region of the device, a first trench and a second trench running toward the edge region, a first electrode within the first trench, and a second...
|
25-Oct-2011 |
| 289 |
US 8046530 B2
patent document
|
Process and method for erase strategy in solid state disks
An embodiment of the invention relates to a nonvolatile mass storage device such as a flash memory device formed with erase blocks partitioned into memory management blocks. An erase block is identified...
|
25-Oct-2011 |
| 290 |
US 8044523 B2
patent document
|
Semiconductor device
The invention relates to a semiconductor device with a semiconductor chip, on which a terminal contact formed in one piece, a patterned metallization layer, contacting the terminal contact, and a connecting...
|
25-Oct-2011 |
| 291 |
US 8044394 B2
patent document
|
Semiconductor wafer with electrically connected contact and test areas
The invention relates to an arrangement of contact areas and test areas on patterned semiconductor chips. The contact areas and the test areas are electrically connected to one another via a conduction web....
|
25-Oct-2011 |
| 292 |
US 8044458 B2
patent document
|
Semiconductor device including a vertical gate zone, and method for producing the same
A semiconductor device includes a semiconductor body defining a trench structure having walls. A plurality of vertical gate zones each have a gate electrode and a gate oxide that covers the walls of the trench...
|
25-Oct-2011 |
| 293 |
US 8044667 B2
patent document
|
Failure detection for series of electrical loads
An apparatus for detecting failures in an illumination device includes at least two light emitting diodes connected in series. The apparatus includes a first, a second, and a third circuit node for interfacing...
|
25-Oct-2011 |
| 294 |
US 8044459 B2
patent document
|
Semiconductor device with trench field plate including first and second semiconductor materials
In one embodiment, a field effect transistor has a semiconductor body, a drift region of a first conductivity type and a gate electrode. At least one trench extends into the drift region. A field plate is...
|
25-Oct-2011 |
| 295 |
US 8044676 B2
patent document
|
IDDQ testing
Embodiments of the invention relate to device-embedded IDDQ testing in the field to detect defects, aging, and other reliability reducing problems. Methods of testing integrated circuits and integrated circuit...
|
25-Oct-2011 |
| 296 |
US 8044650 B2
patent document
|
Methods and apparatus for current sensing in mutually coupled inductors
Methods and apparatus for current sensing in mutually coupled inductors according to various aspects of the present invention may operate in conjunction with a control system adapted to control current through...
|
25-Oct-2011 |
| 297 |
US 2011/0256688 A1
patent application
|
Semiconductor component and methods for producing a semiconductor component
A semiconductor component includes a semiconductor body, in which are formed: a substrate of a first conduction type, a buried semiconductor layer of a second conduction type arranged on the substrate, and a...
|
20-Oct-2011 |
| 298 |
US 2011/0254589 A1
patent application
|
Integrated circuit and method for manufacturing same
An integrated circuit has one or more logic gates and a control circuit. The control circuit has one or more control elements coupled to the logic gates. The control circuit controls the states of the one or...
|
20-Oct-2011 |
| 299 |
US 2011/0254018 A1
patent application
|
Semiconductor Switching Arrangement Having a Normally on and a Normally off Transistor
A semiconductor switching arrangement includes a normally on semiconductor component of a first conduction type and a normally off semiconductor component of a second conduction type which is the complement of...
|
20-Oct-2011 |
| 300 |
US 2011/0256749 A1
patent application
|
Press-Fit Connections for Electronic Modules
A press-fit connecting element for being pressed into a first contact opening in a first connection element and into a second contact opening in a second connection element is provided. The press-fit connecting...
|
20-Oct-2011 |