| No | Document | Title | Date |
|---|---|---|---|
| 501 |
US 7990128 B2
patent document
|
Circuit and method for pulling a potential at a node towards a feed potential
Embodiments of the invention concern a circuit for pulling a potential at a node towards a feed potential which is present at a potential feed. The circuit has a first transistor with a controllable conductive...
|
02-Aug-2011 |
| 502 |
US 7989888 B2
patent document
|
Semiconductor device with a field stop zone and process of producing the same
Embodiments discussed herein relate to processes of producing a field stop zone within a semiconductor substrate by implanting dopant atoms into the substrate to form a field stop zone between a channel region...
|
02-Aug-2011 |
| 503 |
US 7990927 B2
patent document
|
Method and apparatus for transmitting data in a communication system
An apparatus and method of grouping and assigning a plurality of random access sequences, including assigning each random access sequence to one or a plurality of user equipments, to a plurality of users, type...
|
02-Aug-2011 |
| 504 |
US 2011/0182329 A1
patent application
|
Device and method for distortion-robust decoding
A device for decoding code symbols which are interfered with a distortion during a predetermined distortion time interval includes a reliability information generator to provide reliability information based on...
|
28-Jul-2011 |
| 505 |
US 2011/0181459 A1
patent application
|
Systems and methods for incident angle measurement of waves impinging on a receiver
Embodiments relate to radar systems and methods. In an embodiment, a system includes a radio frequency (RF) sensor array comprising a plurality of spaced apart sensors; and a reflector element positioned...
|
28-Jul-2011 |
| 506 |
US 7986024 B2
patent document
|
Fuse sensing scheme
A fuse circuit includes a fuse configured for programming a configuration of an integrated circuit device and a resistive element having a known resistance value operably coupled in parallel with the fuse. The...
|
26-Jul-2011 |
| 507 |
US 7986222 B2
patent document
|
Tire position identification system and method
A tire position identification system and method include a transmitter that is configured to send an initiation signal. A receiver is configured to receive the initiation signal and attenuate the initiation...
|
26-Jul-2011 |
| 508 |
US 7986023 B2
patent document
|
Semiconductor device with inductor
One or more embodiments are directed to a semiconductor structure, comprising: a support; a semiconductor chip at least partially embedded within the support; and an inductor electrically coupled to the chip,...
|
26-Jul-2011 |
| 509 |
US 7986009 B2
patent document
|
Integrated circuit arrangements with ESD-resistant capacitor and corresponding method of production
A circuit arrangement including a capacitor in an n-type well is disclosed. A specific polarization of the capacitor ensures that a depletion zone arises in the well and the capacitor has a high ESD strength....
|
26-Jul-2011 |
| 510 |
US 7985983 B2
patent document
|
Semiconductor ESD device and method of making same
A semiconductor device includes an ESD device region disposed within a semiconductor body of a first semiconductor type, an isolation region surrounding the ESD device region, a first doped region of a second...
|
26-Jul-2011 |
| 511 |
US 7986034 B2
patent document
|
Power semiconductor module and method for producing the same
A method for producing a power semiconductor module including forming a contact between a contact region and a contact element as an ultrasonic welding contact via a sonotrode. The ultrasonic welding operation...
|
26-Jul-2011 |
| 512 |
US 7985676 B2
patent document
|
Method of making a contact in a semiconductor device
To form a semiconductor device, an insulating layer is formed over a conductive region and a pattern transfer layer is formed over the insulating layer. The pattern transfer layer is patterned in the reverse...
|
26-Jul-2011 |
| 513 |
US 7987331 B2
patent document
|
Method and circuit for protection of sensitive data in scan mode
A reset generator for resetting at least one register in a register bank. The register generator comprises a scan mode input terminal configured to input a scan mode signal, a system reset input terminal...
|
26-Jul-2011 |
| 514 |
US 7986033 B2
patent document
|
Three-dimensional multichip module
A three-dimensional multichip module includes a first integrated circuit chip having at least one first high-temperature functional area and one first low-temperature functional area, and at least one second...
|
26-Jul-2011 |
| 515 |
US 7986149 B2
patent document
|
System and method for adaptive load fault detection
In one embodiment, a method for sensing an output fault condition is disclosed. The method includes monitoring an error signal that indicates an output fault condition, and monitoring an input signal having a...
|
26-Jul-2011 |
| 516 |
US 7986044 B2
patent document
|
Signal transmission arrangement and method
Data signals are transmitted between a number of semiconductor chips which are connected to one another in a common chip package. For that a signal transmission arrangement is set up for a transmission of the...
|
26-Jul-2011 |
| 517 |
US 7985642 B2
patent document
|
Formation of active area using semiconductor growth process without STI integration
A semiconductor device can be formed without use of an STI process. An insulating layer is formed over a semiconductor body. Portions of the insulating layer are removed to expose the semiconductor body, e.g.,...
|
26-Jul-2011 |
| 518 |
US 7986005 B2
patent document
|
Short circuit limiting in power semiconductor devices
A power semiconductor device includes a semiconductor body. The semiconductor body includes a body region of a first conductivity type for forming therein a conductive channel of a second conductivity type; a...
|
26-Jul-2011 |
| 519 |
US 2011/0176561 A1
patent application
|
Time-based maintenance via a packet-oriented digital interface in radio-frequency transmitting and receiving assemblies
Disclosed herein are techniques, systems, and methods relating maintaining a time base between receiving and transmitting assemblies during interruption of data streams communicated therebetween.
|
21-Jul-2011 |
| 520 |
US 2011/0175214 A1
patent application
|
Power Semiconductor Module With Interconnected Package Portions
A power semiconductor module includes a package having a first package portion and a second package portion. The side of the first package portion facing the second package portion has an anchoring element with...
|
21-Jul-2011 |
| 521 |
US 2011/0175174 A1
patent application
|
Methods of Manufacturing Resistors and Structures Thereof
A semiconductor device includes a semiconductor body of a first semiconductive material. A transistor is disposed in the semiconductor body. The transistor includes source and drain regions of a second...
|
21-Jul-2011 |
| 522 |
US 2011/0173804 A1
patent application
|
Method for Producing a Housing Part for a Power Semiconductor Module and Method for Producing a Power Semiconductor Module
A method for producing a housing part for a power semiconductor module includes providing a connecting lug having a lower end with a foot region, providing a housing having a side wall with a lead-in bevel, and...
|
21-Jul-2011 |
| 523 |
US 2011/0176589 A1
patent application
|
Methods and systems for measuring data pulses
Some embodiments disclosed herein relate to a method. In the method, a duration of a first synchronization pulse is measured. A fixed, predetermined number of ticks are equally spaced at a first time interval...
|
21-Jul-2011 |
| 524 |
US 7982483 B2
patent document
|
Circuit and method for component communication
A circuit has a supply voltage terminal for receiving a supply voltage of the circuit, wherein a trigger impulse is superimposed on the supply voltage. Further, the circuit has a signal terminal for outputting...
|
19-Jul-2011 |
| 525 |
US 7980138 B2
patent document
|
Integrated circuit with stress sensing element
An integrated circuit includes a semiconductor die, and a stress sensing element. The stress sensing element comprises a first lateral resistor and a first vertical resistor. The stress sensing element is...
|
19-Jul-2011 |
| 526 |
US 7983870 B2
patent document
|
Integrated circuit and method for determining the operating range of an integrated circuit
Method for ascertaining an operating range for an integrated circuit which has a plurality of system components, in which a test routine is performed for testing at least one system component from the plurality...
|
19-Jul-2011 |
| 527 |
US 7982523 B2
patent document
|
Electro static discharge clamping device
Electrostatic discharge clamp devices are described. In one embodiment, the semiconductor device includes a first transistor, the first transistor including a first source/drain and a second source/drain, the...
|
19-Jul-2011 |
| 528 |
US 7983640 B2
patent document
|
Receiver circuit
A receiver circuit for receiving an analog signal comprises a mixer device, a first integrator device coupled to the mixer device, a second integrator device following the first integrator device, a quantizer...
|
19-Jul-2011 |
| 529 |
US 7984432 B2
patent document
|
Method for patching a read-only memory and a data processing system comprising a means of patching the read-only memory based on patch contexts
A method for patching a read-only memory (ROM) includes providing multiple patch contexts in a patch contexts memory, with the ROM providing information for a data processing system. Each patch context defines...
|
19-Jul-2011 |
| 530 |
US 7981789 B2
patent document
|
Feature patterning methods and structures thereof
Methods of patterning features, methods of manufacturing semiconductor devices, and semiconductor devices are disclosed. In one embodiment, a method of patterning a feature includes forming a first portion of...
|
19-Jul-2011 |
| 531 |
US 7981716 B2
patent document
|
Chip module having a protection device
Some embodiments of a chip module comprise a substrate, a semiconductor chip on the substrate, and a first layer between the substrate and the semiconductor chip, the first layer having high reflectivity for...
|
19-Jul-2011 |
| 532 |
US 7982452 B2
patent document
|
Detection of a load state of a half-bridge
Disclosed is a method for diagnosing a half-bridge having a first and a second switching element. The method includes providing a half-bridge that has a first and a second switching element connected in series...
|
19-Jul-2011 |
| 533 |
US 7980134 B2
patent document
|
Measuring device and measured quantity sensor having coupled processing and excitation frequencies
A measuring device for determining a measured quantity having an oscillatory structure where an oscillation signal is detectable. The measuring device further includes a device for exciting the oscillatory...
|
19-Jul-2011 |
| 534 |
US 7982309 B2
patent document
|
Integrated circuit including gas phase deposited packaging material
An integrated circuit includes a substrate including an active area and a gas phase deposited packaging material encapsulating the active area.
|
19-Jul-2011 |
| 535 |
US 7982444 B2
patent document
|
Systems and methods for driving a transistor
This disclosure relates to monitoring and controlling a voltage characteristic of a Drain Extended Metal Oxide Semiconductor (DeMOS) transistor.
|
19-Jul-2011 |
| 536 |
US 7982293 B2
patent document
|
Multi-chip package including die paddle with steps
A lead frame assembly includes at least one die paddle. The die paddle includes a first landing area for receiving a first semiconductor chip and a second landing area for receiving a second semiconductor chip....
|
19-Jul-2011 |
| 537 |
US 7982281 B2
patent document
|
Method of manufacturing a semiconductor device, method of manufacturing a SOI device, semiconductor device, and SOI device
According to one embodiment of the present invention, a SOI device includes a first composite structure including a substrate layer, a substrate isolation layer being disposed on or above the substrate layer, a...
|
19-Jul-2011 |
| 538 |
US 7982289 B2
patent document
|
Wafer and a method for manufacturing a wafer
A wafer includes a wafer frontside and a region adjacent to the device surface, wherein the region includes vacancy-oxygen complexes and the wafer frontside includes a predetermined surface structure to form...
|
19-Jul-2011 |
| 539 |
US 7982292 B2
patent document
|
Semiconductor device
A semiconductor device includes a carrier, a chip coupled to the carrier, a dielectric layer coupled to the carrier and the chip, and conducting elements connected to both the carrier and contacts of the chip....
|
19-Jul-2011 |
| 540 |
US 7983627 B2
patent document
|
Circuit arrangement with improved decoupling
A circuit arrangement includes a component having a closed signal path, that closed signal path connected to a first port, a second port and at least a third port. The component has a directed signal flow of a...
|
19-Jul-2011 |
| 541 |
US 7982488 B2
patent document
|
Phase-change memory security device
A semiconductor chip having a subcircuit formed in a substrate; and a phase-change memory cell located on the subcircuit, and configured to directly detect an attack on the subcircuit, or to form a shield to...
|
19-Jul-2011 |
| 542 |
US 7983215 B2
patent document
|
Communication device, method for transmitting an uplink transmission control message, method for receiving an uplink transmission control message
In an embodiment, a communication device is provided. The communication device may include a scheduling message generating circuit configured to generate a scheduling message such that the scheduling message...
|
19-Jul-2011 |
| 543 |
US 7982253 B2
patent document
|
Semiconductor device with a dynamic gate-drain capacitance
A semiconductor device with a dynamic gate drain capacitance. One embodiment provides a semiconductor device. The device includes a semiconductor substrate, a field effect transistor structure including a...
|
19-Jul-2011 |
| 544 |
US 7982284 B2
patent document
|
Semiconductor component including an isolation structure and a contact to the substrate
A semiconductor component includes a semiconductor body, in which are formed: a substrate of a first conduction type, a buried semiconductor layer of a second conduction type arranged on the substrate, and a...
|
19-Jul-2011 |
| 545 |
US 7982547 B2
patent document
|
Phase locked loop-based tuning adjustable filter
Phase locked loop based frequency tuning of an adjustable filter is disclosed. A resonant circuit includes the adjustable filter, and an oscillator signal provides an input to the resonant circuit.
|
19-Jul-2011 |
| 546 |
US 7983348 B2
patent document
|
System and method for signal transmission
A system and method for signal transmission, a signal modulation and a signal demodulation device, and a method for signal transmission are disclosed. One embodiment includes transmitting a first pulse signal...
|
19-Jul-2011 |
| 547 |
US 7983713 B2
patent document
|
Smart card; communication device; method for selecting a communication network to be used by a communication device; computer program product
Smart cards, a communication device, methods for selecting a communication network to be used by a communication device, and a computer program product.
|
19-Jul-2011 |
| 548 |
US 2011/0169096 A1
patent application
|
Balancing nfet and pfet performance using straining layers
An integrated circuit structure includes a substrate and at least one pair of complementary transistors on or in the substrate. The pair of complementary transistors comprises a first transistor and a second...
|
14-Jul-2011 |
| 549 |
US 2011/0169555 A1
patent application
|
Mitigating Side Effects Of Impedance Transformation Circuits
The present disclosure relates to mitigating side effects of impedance transformation circuits.
|
14-Jul-2011 |
| 550 |
US 2011/0169673 A1
patent application
|
Time-to-digital converter with built-in self test
Apparatuses and methods related to time-to-digital converters (TDCs) are herein described. Generally, a time-to-digital converter is a device which measures a time period or time interval and outputs a digital...
|
14-Jul-2011 |
| 551 |
US 2011/0169564 A1
patent application
|
Integrated Circuit
An integrated circuit is disclosed having a semiconductor component comprising a first p-type region and a first n-type region adjoining the first p-type region, which together form a first pn junction having a...
|
14-Jul-2011 |
| 552 |
US 2011/0170735 A1
patent application
|
Sound Transducer Structure and Method for Manufacturing a Sound Transducer Structure
A sound transducer structure includes a membrane, a counter electrode, and a plurality of elevations. The membrane includes a first main surface, made of a membrane material, in a sound transducing region and...
|
14-Jul-2011 |
| 553 |
US 2011/0173508 A1
patent application
|
Radio receiver and method for channel estimation
A radio receiver includes an input terminal to receive a first radio signal, an equalizer, coupled to the input terminal, to equalize the first radio signal and to output an equalized signal and a first channel...
|
14-Jul-2011 |
| 554 |
US 7977973 B2
patent document
|
Electronic basic unit for a system on chip
An electronic basic unit for a system on chip comprises a semiconductor substrate and an area on the semiconductor substrate. The area is bounded by a geometric basic shape and the electronic basic unit is...
|
12-Jul-2011 |
| 555 |
US 7979482 B2
patent document
|
Random number generator configured to combine states of memory cells
A random number generator includes a plurality of memory cells arranged in a series, a feedback processor for generating a feedback signal and for feeding the feedback signal into one of the memory cells, and a...
|
12-Jul-2011 |
| 556 |
US 7977161 B2
patent document
|
Method of manufacturing a semiconductor package using a carrier
A method of manufacturing a semiconductor package includes providing a carrier, forming a post slot and a terminal slot in the carrier, depositing a post in the post slot, depositing a terminal in the terminal...
|
12-Jul-2011 |
| 557 |
US 7978451 B2
patent document
|
Circuit arrangement comprising an electronic component and an ESD protection arrangement
A description is given of a circuit arrangement including at least one electronic component having first and second terminals, and comprising an ESD protection arrangement against disturbance pulses, is the ESD...
|
12-Jul-2011 |
| 558 |
US 7977167 B2
patent document
|
Method of producing a field effect transistor arrangement
A method of producing a field effect transistor arrangement. A substrate having a first crystal surface orientation is provided. A first layer is formed above a first portion of the substrate, the first layer...
|
12-Jul-2011 |
| 559 |
US 7977709 B2
patent document
|
MOS transistor and semiconductor device
According to one embodiment of the present invention, a MOS transistor includes a semiconductor layer including a source region, a drain region, and a channel region disposed between the source region and the...
|
12-Jul-2011 |
| 560 |
US 7978504 B2
patent document
|
Floating gate device with graphite floating gate
One or more embodiments relate to a memory device, comprising: a substrate; a charge storage layer disposed over the substrate; and a control gate disposed over the charge storage layer, wherein the charge...
|
12-Jul-2011 |
| 561 |
US 7979783 B2
patent document
|
Error detection device and method for error detection for a command decoder
An error detection device for a command decoder is described, the command decoder reading out an associated sequence of control signal words from a command memory based on an input word, wherein the sequence of...
|
12-Jul-2011 |
| 562 |
US 7977768 B2
patent document
|
Semiconductor devices and methods of manufacture thereof
Semiconductor devices and methods of manufacture thereof are disclosed. In one embodiment, a semiconductor device includes a workpiece having a buried layer disposed beneath a top portion thereof. A trench is...
|
12-Jul-2011 |
| 563 |
US 7977737 B2
patent document
|
Semiconductor device having additional capacitance to inherent gate-drain or inherent drain-source capacitance
A semiconductor device with inherent capacitances and method for its production. The semiconductor device has an inherent feedback capacitance between a control electrode and a first electrode. In addition, the...
|
12-Jul-2011 |
| 564 |
US 7979828 B2
patent document
|
Integrated circuit and method for determining an integrated circuit layout
Various methods for determining a layout of an integrated circuit are described. For example, a method is described comprising determining a layout of an integrated circuit comprising a plurality of functional...
|
12-Jul-2011 |
| 565 |
US 7977798 B2
patent document
|
Integrated circuit having a semiconductor substrate with a barrier layer
An integrated circuit having a semiconductor substrate with a barrier layer is disclosed. The arrangement includes a semiconductor substrate and a metallic element. A carbon-based barrier layer is disposed...
|
12-Jul-2011 |
| 566 |
US 2011/0165763 A1
patent application
|
Semiconductor device and method for producing a semiconductor device
A semiconductor device has a semiconductor body with a semiconductor device structure including at least a first electrode and a second electrode. Between the two electrodes, a drift region is arranged, the...
|
07-Jul-2011 |
| 567 |
US 2011/0163440 A1
patent application
|
Semiconductor device
A method of manufacturing a semiconductor device includes providing a carrier and attaching a plurality of semiconductor chips to the carrier. The semiconductor chips have a first electrode pad on a first main...
|
07-Jul-2011 |
| 568 |
US 2011/0163737 A1
patent application
|
Tire Pressure Measurement System with Reduced Current Consumption
A tire pressure measurement system (TPMS) includes a capacitor and an integrated circuit configured to receive a supply voltage. The integrated circuit includes a voltage regulator and a measurement unit. The...
|
07-Jul-2011 |
| 569 |
US 2011/0165755 A1
patent application
|
Semiconductor Component Arrangement Comprising a Trench Transistor
Disclosed is a semiconductor component arrangement and a method for producing a semiconductor component arrangement. The method comprises producing a trench transistor structure with at least one trench...
|
07-Jul-2011 |
| 570 |
US 2011/0163598 A1
patent application
|
Method and Apparatus for Controlling a Supply Current for a Circuit or a Plurality of Circuit Blocks
A method for controlling a supply current for a circuit includes setting a target value of a quantity related to a supply current, said target value being different from a presently established value of the...
|
07-Jul-2011 |
| 571 |
US 2011/0163395 A1
patent application
|
Pressure Sensor and Method
A method for providing a pressure sensor substrate comprises creating a first cavity that extends inside the substrate in a first direction perpendicular to a main surface of the substrate, and that extends...
|
07-Jul-2011 |
| 572 |
US 2011/0163366 A1
patent application
|
Semiconductor Component Arrangement Comprising a Trench Transistor
Disclosed is a semiconductor component arrangement and a method for producing a semiconductor component arrangement. The method comprises producing a trench transistor structure with at least one trench...
|
07-Jul-2011 |
| 573 |
US 7972954 B2
patent document
|
Porous silicon dielectric
Embodiments of the invention provide a semiconductor device having dielectric material and its method of manufacture. A manufacturing method comprises forming a layer of silicon over a substrate, forming an...
|
05-Jul-2011 |
| 574 |
US 7973547 B2
patent document
|
Method and apparatus for detecting a crack in a semiconductor wafer, and a wafer chuck
A method for detecting a crack in a semiconductor wafer, which includes an electrical device and a connecting pad electrically coupled with the electrical device, is described. The crack is detected by an...
|
05-Jul-2011 |
| 575 |
US 7973362 B2
patent document
|
Semiconductor component and method for producing it
A semiconductor component includes a semiconductor body having an edge with an edge zone of a first conductivity type. Charge compensation regions of a second conductivity type are embedded into the edge zone,...
|
05-Jul-2011 |
| 576 |
US 7973528 B2
patent document
|
Sensor device
A sensor device for detecting a relative movement including a transmitter unit configured to generate a field. The transmitter unit includes first transmitter elements and second transmitter elements, wherein...
|
05-Jul-2011 |
| 577 |
US 7974114 B2
patent document
|
Memory cell arrangements
In an embodiment, a memory cell arrangement is provided. The memory cell arrangement may include a first memory cell and a second memory cell, a first source/drain line coupled to a first source/drain region of...
|
05-Jul-2011 |
| 578 |
US 7971794 B2
patent document
|
Actively regulated modulation index for contactless IC devices
A contactless IC device including a detection circuit configured to detect a carrier wave that has been amplitude shift-keying (ASK) modulated with digital data and a shunt circuit configured to regulate the...
|
05-Jul-2011 |
| 579 |
US 7974120 B2
patent document
|
Spin device
According to an embodiment of the present invention, a spin device includes an intermediate semiconductor region arranged between a first terminal and a second terminal, wherein the first terminal is adapted to...
|
05-Jul-2011 |
| 580 |
US 7972947 B2
patent document
|
Method for fabricating a semiconductor element, and semiconductor element
In a method for fabricating a semiconductor element in a substrate, first implantation ions are implanted into the substrate, whereby micro-cavities are produced in a first partial region of the substrate....
|
05-Jul-2011 |
| 581 |
US 7973358 B2
patent document
|
Coupler structure
One or more embodiments relate to a semiconductor device, comprising: a substrate; and a radio frequency coupler including a first coupling element and a second coupling element spacedly disposed from the first...
|
05-Jul-2011 |
| 582 |
US 7973369 B2
patent document
|
Semiconductor devices and methods of manufacture thereof
Methods of forming transistors and structures thereof are disclosed. A preferred embodiment comprises a semiconductor device including a workpiece, a gate dielectric disposed over the workpiece, and a thin...
|
05-Jul-2011 |
| 583 |
US 7973359 B2
patent document
|
Semiconductor device with a charge carrier compensation structure and process
A semiconductor device with a charge carrier compensation structure. In one embodiment, the semiconductor device has a central cell field with a gate and source structure. At least one bond contact area is...
|
05-Jul-2011 |
| 584 |
US 7973365 B2
patent document
|
Integrated RF ESD protection for high frequency circuits
The invention relates to a high-frequency integrated circuit requiring ESD protection for a circuit node. One or more metallic layer is deposited within the integrated circuit and patterned to form a...
|
05-Jul-2011 |
| 585 |
US 7975246 B2
patent document
|
MEEF reduction by elongation of square shapes
A method that purposely relaxes OPC algorithm constraints to allow post OPC mask shapes to elongate along one direction (particularly lowering the 1-dimensional MEEF in this direction with the result of an...
|
05-Jul-2011 |
| 586 |
US 2011/0156095 A1
patent application
|
Semiconductor Component with an Emitter Control Electrode
A semiconductor component includes a first emitter zone of a first conductivity type, a second emitter zone of a second conductivity type, a first base zone arranged between the first and second emitter zones...
|
30-Jun-2011 |
| 587 |
US 2011/0161534 A1
patent application
|
Control Architectures for RF Transceivers
Described herein are devices and methods for implementing a transceiver with independently controlled components. The components may include a programmable digital portion, a dedicated digital portion, and an...
|
30-Jun-2011 |
| 588 |
US 7970086 B2
patent document
|
System and method for clock drift compensation
A method for processing a signal includes monitoring an over-sampled signal to detect deviations in a number of fill samples, and providing an electronic delay adjustment to a signal path. If a deviation in the...
|
28-Jun-2011 |
| 589 |
US 7971076 B2
patent document
|
Circuitry and method for monitoring a supply voltage
A method for monitoring the supply voltage of an electronic device includes the steps of: determining an operating condition of the electronic device, adjusting a plurality of reference voltages dependent on...
|
28-Jun-2011 |
| 590 |
US 7969018 B2
patent document
|
Stacked semiconductor chips with separate encapsulations
Stacked semiconductor chips. One embodiment provides a device having a first body. A first power semiconductor chip and first external contact elements is provides. A second body includes a second semiconductor...
|
28-Jun-2011 |
| 591 |
US 7968972 B2
patent document
|
High-frequency bipolar transistor and method for the production thereof
A high-frequency bipolar transistor includes an emitter contact adjoining an emitter connection region, a base contact adjoining a base connection region, and a collector contact adjoining a collector...
|
28-Jun-2011 |
| 592 |
US 7969135 B2
patent document
|
Regulation circuit and a method for regulating an input voltage
A regulation circuit comprises an error detector, an integrator, and a voltage regulator. The error detector comprises an input for an input voltage, a further input for a reference voltage and an output for an...
|
28-Jun-2011 |
| 593 |
US 7969763 B2
patent document
|
Detector circuit for detecting an external manipulation of an electrical circuit, circuit arrangement comprising a plurality of detector circuits, memory device and method for operating a detector circuit
A detector circuit for detecting an external manipulation of an electrical circuit. The detector circuit includes a digital circuit which is sensitive to at least one of the effects of ionizing radiation or...
|
28-Jun-2011 |
| 594 |
US 7968934 B2
patent document
|
Memory device including a gate control layer
An integrated memory device, an integrated memory chip and a method for fabricating an integrated memory device is disclosed. One embodiment provides at least one integrated memory device with a drain, a...
|
28-Jun-2011 |
| 595 |
US 7969041 B2
patent document
|
System where the number of conductors equals the number of sensors and each of the sensors receives voltages via a different set of two conductors and provides data via the different set of two conductors
A system includes a control circuit, supply circuits, and sensors. The control circuit controls the supply circuits to power each of the sensors and obtain data from the powered sensors. If one of the supply...
|
28-Jun-2011 |
| 596 |
US 7970364 B2
patent document
|
Strategy for using the envelope information within a closed loop power control system
A power control system includes a reference path filter used to suppress high frequencies in an input signal and generate a filtered envelope signal, a reference path amplifier to scale the filtered input...
|
28-Jun-2011 |
| 597 |
US 7968378 B2
patent document
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Electronic device
One embodiment provides a method of manufacturing semiconductor devices. For example, a sawn and expanded wafer is utilized having dielectrical material deposited between the diced and deposited chips. The...
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28-Jun-2011 |
| 598 |
US 7968416 B2
patent document
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Integrated circuit arrangement with NPN and PNP bipolar transistors and corresponding production method
An integrated circuit arrangement and fabrication method is provided. The integrated circuit arrangement contains an NPN transistor and a PNP transistor. The PNP transistor contains an emitter connection region...
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28-Jun-2011 |
| 599 |
US 7968919 B2
patent document
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Integrated circuit including a charge compensation component
A charge compensation component having a drift path between two electrodes, an electrode and a counterelectrode, and methods for producing the same. The drift path has drift zones of a first conduction type and...
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28-Jun-2011 |
| 600 |
US 7968988 B2
patent document
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Power semiconductor module having a thermally conductive base plate on which at least four substrates are arranged in at least one single row
The power semiconductor module (1) has a heat-conducting base plate (11) on which at least three substrates (2, 3, 4, 5, 6, 7) are placed, each substrate supporting at least one power semiconductor component...
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28-Jun-2011 |