Intel

A processor is to comprise a central processing unit (CPU), an address generation unit (AGU), an index generation unit and a translation look-aside buffer (TLB). The CPU of the processor is to generate signal...

An embodiment of the present invention provides an apparatus, comprising at least one transceiver operable in a wireless personal area network (WPAN), wherein the at least one transceiver is equipped with the...

A method, apparatus, article of manufacture, and system, the method including, in some embodiments, determining an impedance of a power distribution network of a load for a range of frequencies, and adjusting a...

A phase change memory may be made with improved speed and stable characteristics over extended cycling. The alloy may be selected by looking at alloys that become stuck in either the set or the reset state and...

In one embodiment, a method to analyze a semiconductor wafer comprises extracting inline defect data from a data source, counting a total number of inline defects and end-of-line defects, terminating the...

In accordance with some embodiments, software transactional memory may be used for both managed and unmanaged environments. If a cache line is resident in a cache and this is not the first time that the cache...

The present invention discloses a method of cooling an ultramobile device with microfins attached to an external wall of an enclosure surrounding the ultramobile device.

An apparatus including a first diffusion formed on a substrate, the first diffusion including a pair of channels, each of which separates a source from a drain; a second diffusion formed on the substrate, the...

An image capture system comprises an image input and processing unit. The image input obtains image information which is then passed to the processing unit. The processing unit is coupled to the image input for...

Memory control techniques for dual channel lockstep configurations are disclosed. In accordance with one example embodiment, a memory controller issues two burst-length 4 DRAM commands to two double-data-rate...

An apparatus that includes a plurality of metalized planes, one or more dielectric layers separating the plurality of metalized planes; and one or more conductive trenches connecting to at least one of the...

A system, apparatus, method and article to manage diversity for a wireless multicarrier communication system are described. An apparatus may include a diversity agent to couple to a transmitter, the diversity...

Embodiments of an optical detection apparatus are disclosed which may include one or more of a waveguide, a trench formed in the waveguide, a reflective surface, and a photodetector. The waveguide may be formed...

Winged via structures to increase overlay margin are generally described. In one example, a method comprises depositing a sacrificial layer to an interlayer dielectric, the interlayer dielectric being coupled...

A data processing system isolates a virtual trusted platform module (vTPM) manager in the processing system from other management software in the processing system. In one example process, the processing system...

A transistor provides a voltage source commonly switched by SE and SO switches to pre-charge both the even bitline and the odd bitline. The SE and SO switches are open during a sensing stage to determine...

A high-speed serial link receiver includes variable offset comparators with centrally controlled offset cancellation. The receiver includes a comparator stage to receive a high-speed differential input signal....

Embodiments of a cryptograph processing device and method for adapting to shared-cache attacks are generally described herein. Other embodiments may be described and claimed. In some embodiments, the...

A sink device service discovery initiation procedure performed at the Protocol Adaptation Layer (PAL) is described.

In an embodiment, a method is provided. The method of this embodiment provides receiving a request for data from a processor of a plurality of processors, determining a cache entry location based, at least in...

Apparatus and methods provide a Tomlinson-Harashima precoder scheme in which a feedback filter may be constructed to match an approximated feedforward filter, where the feedforward filter is approximated using...

The present invention discloses a method of cooling an ultramobile device with microfins attached to an external wall of an enclosure surrounding the ultramobile device.

A computer system has a controller and a voltage regulator. The controller generates a power consumption state signal for one or more components of the computer system to the voltage regulator. The voltage...

A wireless network includes access points arranged in concentric rings and grids of concentric rings. At low network loads, only access points in the center are on to reduce power consumption. As network loads...

Methods and apparatuses for identifying types of data streams and communicating stream information to improve performance of data storage devices are disclosed. Method embodiments generally comprise identifying...

A method and apparatus are provided for encoding and decoding a communication signal. Processes for encoding and decoding the communication signal use a first low density parity-check code (LDPC) construction...

A host device and a storage device with a Serial ATA (SATA) architecture to independently transition to a deeper low power state after first entering an initial low power state without first transitioning to...

Briefly, in accordance with one or more embodiments, the location of a mobile device within a floor plan of a building or the like environment may be determined using a single transmission link between...

A system may include a graphics memory, a data bus, a processor, and a vertex shader. The data bus may be operatively connected to the graphics memory. The processor may send vertex data to the graphics memory...

The formation of electronic assemblies is described. One embodiment includes first and second semiconductor die structures each including a front side and a backside, the front side including an active region...

A circuit board may include hybrid via structures configured to connect to components, such as connectors and electronic components, mounted on the circuit board. A hybrid via structure may include one or more...

A method, device, and system are disclosed. In one embodiment the method includes grouping multiple memory requests into multiple of memory rank queues. Each rank queue contains the memory requests that target...

In one embodiment, the present invention includes a switch device to be coupled between a first semiconductor component and a processor node by interconnects of a communication protocol that provides for cache...

Embodiments of the present invention provide for downlink and uplink control feedback signaling. In some embodiments, one or more bits indicating a validation of control feedback may be transmitted in a...

Methods and apparatus to provide per die temperature programming for thermally efficient integrated circuit (IC) operation are described. In some embodiments, the junction temperature of an IC component is...

A system for selectively transmitting packets involves marking a plurality of packets coming into a transmit queue with an indicator of a packet type. Some packet types may take longer to process than others....

Devices in a processing system may be managed by performing a first scan of a bus of the processing system from a first partition. In one embodiment, the first scan may discover location information for devices...

Embodiments of apparatuses, methods, and systems for partitioning memory mapped device configuration space are disclosed. In one embodiment, an apparatus includes a configuration space address storage location,...

The present disclosure provides a method for reducing memory traffic in a distributed memory system. The method may include storing a presence vector in a directory of a memory slice, said presence vector...

A media independent trigger model for multiple network types is disclosed. A change in communication environment trigger is communicated from a media dependent interface to an upper media independent...

A dynamic A-MSDU enabling method is disclosed. The method enables the recipient of an aggregate MAC service data unit (A-MSDU) under a block ACK agreement to reject the A-MSDU. The method thus distinguishes...

Briefly, in accordance with one embodiment of the invention, a channel state information packet is encoded by a receiver side device and is fed back to the transmitter side device. The transmitter side device...

Early issue of transaction ID is disclosed. An apparatus comprising decoder to generate a first node ID indicative of the destination of a cache transaction from a caching agent, a transaction ID allocation...

In some embodiments, an electronic apparatus comprises a communication interface, an input/output interface, a processor, and logic to collect, in the electronic apparatus, a first identifier associated with a...

Automatic configuration of devices upon introduction into a networked environment, can be implemented, for example, by having a device randomly generate a series of letters and/or numbers, e.g., generate a PIN...

Apparatus and systems, as well as methods and articles, may operate to distinguish between sources of signals transmitted with a pilot carrier based upon a variance in a peak-to-peak amplitude of a sum of a...

In one aspect, circuitry to determine a modular remainder with respect to a polynomial of a message comprised of a series of segment. In another aspect, circuitry to access at least a portion of a first number...

A computer system may comprise a second device operating as a producer that may steer data units to a first device operating as a consumer. A processing core of the first device may wake-up the second device...

Methods and systems to compile a code module to permit a caller routine to pass a parameter to a callee routine of a separately compiled code module, and to permit a callee routine to receive a parameter from a...

A composite buffer architecture for forming a III-V device layer on a silicon substrate and the method of manufacture is described. Embodiments of the present invention enable III-V InSb device layers with...