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No	Document	Title	Date
101	US 8094234 B2 patent document	System and method for multistage frame rate conversion System and method for multistage frame rate conversion. A method comprises receiving an incoming frame at a first frame rate, and determining whether a fault condition exists. The method also includes if the...	10-Jan-2012
102	US 8093070 B2 patent document	Method for leakage reduction in fabrication of high-density FRAM arrays A method is provided for fabricating a ferroelectric capacitor structure including a method for etching and cleaning patterned ferroelectric capacitor structures in a semiconductor device. The method comprises...	10-Jan-2012
103	US 8093878 B2 patent document	Switching power supply device A switching power supply device for a ripple control system that can obtain the ripple component with the necessary amplitude without using discrete elements. On capacitor Ci of CR integrator 11, a voltage is...	10-Jan-2012
104	US 8094638 B2 patent document	Adaptive selection of transmission parameters for reference signals An embodiment of the present invention uses estimates of delay spreads of transmissions from user equipments (UEs) to a NodeB to determine a set of transmission parameters for the UEs reference signals. In an...	10-Jan-2012
105	US 8095840 B2 patent document	Serial scan chain in a star configuration A method implemented to test a plurality of components coupled in a star configuration, each component having a test access port (TAP) controller. The method comprises performing a capture phase of a scan...	10-Jan-2012
106	US 8094352 B2 patent document	Mirror assembly with recessed mirror A mirror device and a method for manufacturing the mirror device are presented. The mirror device includes a mirror formed from a first substrate and a hinge/support structure formed from a second substrate....	10-Jan-2012
107	US 8093622 B2 patent document	Semiconductor device and its driving method A semiconductor device having a thyristor SCR with reduced turn-off time. A third semiconductor region of the second conductivity type (anode AN) and a fourth semiconductor region of the first conductivity type...	10-Jan-2012
108	US 8093716 B2 patent document	Contact fuse which does not touch a metal layer The present invention provides a semiconductor device fuse, comprising a metal layer and a first semiconductor layer that electrically couples the metal layer to a fuse layer, wherein the fuse layer is spaced...	10-Jan-2012
109	US 8093925 B2 patent document	Current driver circuit An integrated regulated current drive circuit for driving a squib of an inflatable airbag has a current sense resistor connected in series with a load, and a reference resistor connected in series with a...	10-Jan-2012
110	US 8093941 B2 patent document	Systems and devices for dynamically scaled charge pumping Systems and devices for dynamically scaled charge pumping are presented. Example embodiments of the disclosed systems of dynamically scaled charge pumping enable regulation of the output voltage at a particular...	10-Jan-2012
111	US 8095839 B2 patent document	Position independent testing of circuits Scan distributor, collector, and controller circuitry connect to the functional inputs and outputs of core circuitry on integrated circuits to provide testing through those functional inputs and outputs....	10-Jan-2012
112	US 2012/0002471 A1 patent application	Memory Bit Redundant Vias An integrated circuit containing a memory array with memory bits and a differential sense amplifier for reading the logic state of the memory bits. The integrated circuit also contains redundant vias which are...	05-Jan-2012
113	US 2012/0002729 A1 patent application	Method and apparatus for low cost coefficient-suppression for video compression A method for video compression and a video encoder. The method for video compression includes finding a coefficient relating to inter-coded block with a biggest absolute value, determining the number of...	05-Jan-2012
114	US 2012/0005546 A1 patent application	Interconnections for plural and hierarchical p1500 test wrappers A test architecture accesses IP core test wrappers within an IC using a Link Instruction Register (LIR). An IEEE P1500 standard is in development for providing test access to these individual cores via a test...	05-Jan-2012
115	US 2012/0005400 A1 patent application	Dual In Line Memory Module with Multiple Memory Interfaces A memory module such as a DIMM includes two separate memories with corresponding data, address and control interfaces. Each separate memory core includes plural memory banks for corresponding portions of the...	05-Jan-2012
116	US 2012/0002714 A1 patent application	Communication on a Pilot Wire Systems and methods are disclosed for communicating on a pilot wire between Electric Vehicle Service Equipment (EVSE) and an Electric Vehicle (EV). The EVSE and EV exchange a Pulse Width Modulation (PWM) signal...	05-Jan-2012
117	US 2012/0001336 A1 patent application	Corrosion-resistant copper-to-aluminum bonds A connection formed by a copper wire (112) alloyed with a noble metal in a first concentration bonded to a terminal pad (101) of a semiconductor chip; the end of the wire being covered with a zone (302)...	05-Jan-2012
118	US 8088664 B2 patent document	Method of manufacturing integrated deep and shallow trench isolation structures A method of forming an integrated deep and shallow trench isolation structure comprises depositing a hard mask on a film stack having a plurality of layers formed on a substrate such that the hard mask is...	03-Jan-2012
119	US 2011/0316740 A1 patent application	Reacquiring Satellite Signals Quickly Embodiments of the invention provide a method of reacquiring satellite signals quickly. A pseudorange of at least one satellite is estimated. A user's position is also estimated. Then a signal from at one or...	29-Dec-2011
120	US 2011/0316505 A1 patent application	Output Buffer With Improved Output Signal Quality An output buffer receives an input signal and generates an output signal at an output node. The output buffer contains a driver circuit. The driver circuit includes two pairs of cascoded transistors connected...	29-Dec-2011
121	US 2011/0317762 A1 patent application	Video encoder and packetizer with improved bandwidth utilization Techniques for managing a video encoding pipeline are disclosed herein. In one embodiment, a video encoder includes a multi-stage encoding pipeline. The pipeline includes an entropy coding engine and a...	29-Dec-2011
122	US 2011/0317786 A1 patent application	System and Method for Estimating a Transmit Channel Response and/or a Feedback Channel Response Using Frequency Shifting Systems and methods for identifying a transmission channel response and a feedback channel response from a plurality of composite system responses are disclosed. A plurality of shifted feedback signals are...	29-Dec-2011
123	US 2011/0320850 A1 patent application	Offline at start up of a powered on device A method comprises a system comprising a host device coupled to a first remote device actively operating according to a state diagram that the host device and all remote devices follow during operation of the...	29-Dec-2011
124	US 2011/0316089 A1 patent application	Semiconductor device with gate-undercutting recessed region A semiconductor device comprises a gate structure on a semiconductor substrate and a recessed region in the semiconductor substrate. The recessed region has a widest lateral opening that is near a top surface...	29-Dec-2011
125	US 2011/0316621 A1 patent application	Low input bias current chopping switch circuit and method A chopper-stabilized circuit (1) includes pre-chopping circuitry (26) for chopping an input signal (Vin) at a first frequency to generate a first signal. Input chopping circuitry (9) chops the first signal at a...	29-Dec-2011
126	US 2011/0317702 A1 patent application	Two-Hop Star Network Topology Extension Relayed nodes communicate with a target hub using a relaying node in a two-hop star network. The relayed nodes transmit a first encapsulating frame having a payload that comprises an encapsulated frame. The...	29-Dec-2011
127	US 2011/0317719 A1 patent application	Data link layer headers A system for communicating protocol layer processing information is disclosed herein. A transmitter includes a protocol layer header generator that generators a header for a first protocol data unit. The header...	29-Dec-2011
128	US 2011/0317779 A1 patent application	Scrambling sequences for wireless networks An integrated circuit includes logic configured to generate scrambling sequences, each based on a different scrambling seed, for a smart-utility-network data packet communication. A Hamming distance between any...	29-Dec-2011
129	US 2011/0318901 A1 patent application	Semiconductor device with gate-undercutting recessed region A semiconductor device comprises a gate structure on a semiconductor substrate and a recessed region in the semiconductor substrate. The recessed region has a widest lateral opening that is near a top surface...	29-Dec-2011
130	US 2011/0320897 A1 patent application	Core circuit test architecture A scan test architecture facilitates low power testing of semiconductor circuits by selectively dividing the serial scan paths into shorter sections. Multiplexers between the sections control connecting the...	29-Dec-2011
131	US 2011/0316738 A1 patent application	Adjusting a Bandwidth of GNSS Receivers Embodiments of the invention provide a method of adjusting a bandwidth of receivers. A plurality of outputs from a correlator engine are combined. User dynamics are sensed. Bandwidth of one or more receivers...	29-Dec-2011
132	US 2011/0317476 A1 patent application	Bit-by-Bit Write Assist for Solid-State Memory A solid-state memory in which write assist circuitry is implemented within each memory cell. Each memory cell includes a storage element, such as a pair of cross-coupled inverters, that is connected in series...	29-Dec-2011
133	US 8085008 B2 patent document	System for accounting for switch impendances A Universal Serial Bus (USB) switch matrix is provided. The switch matrix generally comprises a switch network, and amplifier, a adjustable current source, and variable resistors. The switch network is able to...	27-Dec-2011
134	US 8084787 B2 patent document	PMD liner nitride films and fabrication methods for improved NMOS performance Semiconductor devices (102) and fabrication methods (10) are provided, in which a nitride film (130) is formed over NMOS transistors to impart a tensile stress in ail or a portion of the NMOS transistor to...	27-Dec-2011
135	US 8084312 B2 patent document	Nitrogen based implants for defect reduction in strained silicon A transistor is fabricated upon a semiconductor substrate, where the yield strength or elasticity of the substrate is enhanced or otherwise adapted. A strain inducing layer is formed over the transistor to...	27-Dec-2011
136	US 8085580 B2 patent document	System for bitcell and column testing in SRAM A system comprises a storage cell coupled to multiple bitlines and a transistor that couples to the multiple bitlines in parallel with the storage cell. The transistor is activated while the storage cell is...	27-Dec-2011
137	US 8085940 B2 patent document	Rebalancing of audio Rebalancing of an audio signal refers to achieving a balance of perceived loudness, typically of right and left channels, given an unbalanced input. A flexible method to automatically rebalance an audio input...	27-Dec-2011
138	US 8085958 B1 patent document	Virtualizer sweet spot expansion Audio loudspeaker virtualizers and cross-talk cancellers and methods use a combination of interaural intensity difference and interaural time difference to define virtualizing filters. This allows enlargement...	27-Dec-2011
139	US 8085074 B1 patent document	Fast-locking delay locked loop A fast locking delay-locked loop (DLL), which can also operate as a clock data recovery circuit (CDR), includes a delay chain, a sampling circuit and a transition detector. An input signal and delayed versions...	27-Dec-2011
140	US 8085951 B2 patent document	Method and system for determining a gain reduction parameter level for loudspeaker equalization Methods, digital systems, and computer readable media are provided for determining a gain reduction parameter level for loudspeaker equalization by determining a noise score, an equalization effectiveness...	27-Dec-2011
141	US 8083961 B2 patent document	Method and system for controlling the uniformity of a ballistic electron beam by RF modulation A method and system for treating a substrate using a ballistic electron beam is described, whereby the radial uniformity of the electron beam flux is adjusted by modulating the source radio frequency (RF)...	27-Dec-2011
142	US 2011/0309807 A1 patent application	Electronic device for switched dc-dc conversionand method for operating the same An electronic device for switched DC-DC conversion of an input voltage level into an output voltage level, comprising a first power switch and a second power switch, being connected in parallel and having a...	22-Dec-2011
143	US 2011/0310859 A1 patent application	Basic service set scheduling based on media access controller states Apparatus and methods for controlling a wireless device concurrently operating in more than one basic service set (BSS). In one embodiment, a wireless device includes a first medium access controller (MAC), a...	22-Dec-2011
144	US 2011/0314321 A1 patent application	High speed digital bit stream automatic rate sense detection As part of the protocol for Common Public Radio Interface/Open Base Station Architecture Initiative (CPRI/OBSAI) systems, multiple data rates are support, which are each supported by one or more reference clock...	22-Dec-2011
145	US 2011/0310869 A1 patent application	Enhancing packet aggregation performance in coexisting wireless networks A method of communications for a coexisting wireless network including a wireless combination (combo) device communicating via a first wireless network and second wireless network, and a first wireless device...	22-Dec-2011
146	US 2011/0314348 A1 patent application	Scan testing using scan frames with embedded commands Testing of integrated circuits is achieved by a test architecture utilizing a scan frame input shift register, a scan frame output shift register, a test controller, and a test interface comprising a scan...	22-Dec-2011
147	US 2011/0310966 A1 patent application	Syntax element decoding Techniques for efficient syntax element decoding in a system employing context-based adaptive binary arithmetic decoding are disclosed herein. In some embodiments, a video decoding system includes a...	22-Dec-2011
148	US 2011/0310999 A1 patent application	Dynamic Optimization of Overlap-and-Add Length A method of performing overlap-and-add length for zero-padded suffixes. The method includes derotating received information symbol samples. The derotated received information symbol samples include a first set...	22-Dec-2011
149	US 2011/0312168 A1 patent application	Formation of shallow junctions by diffusion from a dielectric doped by cluster or molecular ion beams A process for forming diffused region less than 20 nanometers deep with an average doping dose above 1014 cm−2 in an IC substrate, particularly LDD region in an MOS transistor, is disclosed. Dopants are...	22-Dec-2011
150	US 2011/0314301 A1 patent application	Systems and methods for hardware key encryption Various systems and methods for implementing dynamic logic are disclosed herein. For example, some embodiments of the present invention provide systems for encrypting/decrypting data. Such systems include a...	22-Dec-2011
151	US 2011/0312144 A1 patent application	Novel method to enhance channel stress in cmos processes The invention provides a method of fabricating a semiconductor device that enhances the amount of stress that is transmitted to the channel region for carrier mobility enhancement. In one embodiment an...	22-Dec-2011
152	US 2011/0309440 A1 patent application	High voltage transistor using diluted drain An integrated circuit containing an extended drain MOS transistor may be formed by forming a drift region implant mask with mask fingers abutting a channel region and extending to the source/channel active...	22-Dec-2011
153	US 2011/0309523 A1 patent application	Pop precursor with interposer for top package bond pad pitch compensation An electronic assembly adapted for forming package on package (PoP) devices includes a package substrate having a molded IC die thereon that defines a mold cap height and substrate contact pads lateral to the...	22-Dec-2011
154	US 2011/0310826 A1 patent application	Intentional idle gaps in coexisting wireless networks A wireless combination device includes a first wireless transceiver configured for communication via a first wireless network over a first band, and a second wireless transceiver configured for communication...	22-Dec-2011
155	US 2011/0311153 A1 patent application	Reduced calculations in determining intra-prediction type method and system The method, system, and apparatus of source statistics based intra prediction type is disclosed. In one embodiment, a method includes classifying a four-pixel square block in an edge class (e.g., may include a...	22-Dec-2011
156	US 2011/0314310 A1 patent application	Low-Power Data Loop Recorder A system and method are disclosed for capturing pre- and post-event data for random events using minimum power. Real-time data is captured and stored in a continuous loop in a segment of a first memory. Upon...	22-Dec-2011
157	US 8081481 B2 patent document	Apparatus and method for a clip device for coupling a heat sink plate system with a burn-in board system A clip for coupling a first board and second board, the first board having plurality of first post coupled thereto, the second board having a plurality of second posts coupled thereto, each second post being a...	20-Dec-2011
158	US 2011/0304596 A1 patent application	Method and apparatus for increasing a perceived resolution of a display According to one embodiment, a method of increasing a perceived resolution of a display includes directing light at a optical dithering element and repeatedly transitioning the optical dithering element from a...	15-Dec-2011
159	US 2011/0306172 A1 patent application	Lateral trench mosfet having a field plate One embodiment relates to an integrated circuit that includes a lateral trench MOSFET disposed in a semiconductor body. The lateral trench MOSFET includes source and drain regions having a body region...	15-Dec-2011
160	US 2011/0304994 A1 patent application	Conductive via structures for routing porosity and low via resistance, and processes of making An integrated circuit structure includes a first conductive layer (MET4) including a first forked conductive structure (310), an insulating layer (320, ILD45) substantially disposed over the first forked...	15-Dec-2011
161	US 2011/0306170 A1 patent application	Novel Method to Improve Performance by Enhancing Poly Gate Doping Concentration in an Embedded SiGe PMOS Process A method for forming an embedded SiGe (eSiGe) PMOS transistor (102) with improved PMOS poly gate (108) doping concentration without increasing mask count and causing S/D overrun issue. After gate sidewall...	15-Dec-2011
162	US 2011/0305044 A1 patent application	Sweeping frequency llc resonant power regulator An LLC resonant power regulator system (10) includes a transformer (22) comprising a primary inductor (20) and a secondary inductor (26) and an input resonant tank (18) comprising an input resonant capacitor,...	15-Dec-2011
163	US 2011/0307750 A1 patent application	Compressed scan chain diagnosis by internal chain observation, processes, circuits, devices and systems Electronic scan circuitry includes a decompressor (510), a plurality of scan chains (520.i) fed by the decompressor (510), a scan circuit (502, 504) coupled to the plurality of scan chains (520.i) to scan them...	15-Dec-2011
164	US 2011/0303959 A1 patent application	Ultraviolet Energy Shield for Non-Volatile Charge Storage Memory An integrated circuit with non-volatile memory cells shielded from ultraviolet light by a shielding structure compatible with chemical-mechanical processing. The disclosed shielding structure includes a roof...	15-Dec-2011
165	US 2011/0304493 A1 patent application	Ternary search sar adc Traditionally, successive approximation register (SAR) analog-to-digital converters (ADCs) using binary search algorithms have consumed power by performing unnecessary switching of a capacitive...	15-Dec-2011
166	US 2011/0306176 A1 patent application	Alignment mark for opaque layer An IC alignment mark in a contact metal layer for use under an opaque layer, and a process for forming the alignment mark, are disclosed. The alignment mark includes contact metal fields, each several microns...	15-Dec-2011
167	US 2011/0304492 A1 patent application	Multi-channel sar adc For high voltage applications, multi-channel successive approximation register (SAR) analog-to-digital converters (ADCs) are often plagued with numerous problems that are generally associated with parasitics...	15-Dec-2011
168	US 2011/0304373 A1 patent application	Low voltage high-speed wave shaping circuitry Within hard disk drives (HDDs), for example, a preamplifier or preamp is generally used to perform read and write operations with a magnetic head. Typically, for write operations, the preamplifier generates a...	15-Dec-2011
169	US 2011/0306207 A1 patent application	Method of fabricating metal-bearing integrated circuit structures having low defect density A method of fabricating metal-bearing structures in an integrated circuit such as metal-polysilicon capacitors using conductive metal compounds. Defects due to organometallic polymers formed during the etch of...	15-Dec-2011
170	US 2011/0304349 A1 patent application	Lateral coupling enabled topside only dual-side testing of tsv die attached to package substrate A method of topside only dual-side testing of an electronic assembly includes providing a singulated through substrate via (TSV) die flip chip attached to a die support including a package substrate. The TSVs...	15-Dec-2011
171	US 2011/0303976 A1 patent application	High voltage channel diode A channel diode structure having a drift region and method of forming. A charge balanced channel diode structure having an electrode shield and method of forming.	15-Dec-2011
172	US 2011/0304490 A1 patent application	Low power comparator for use in sar adcs Successive approximation register (SAR) analog-to-digital converters (ADCs) generally use one or more comparators to convert an analog signal to a digital signal. These comparators, however, can consume a great...	15-Dec-2011
173	US 8078842 B2 patent document	Removing local RAM size limitations when executing software code An electronic device that comprises a processor including an individual instruction and a first group of instructions. The device further comprises a memory externally coupled to the processor, as well as a...	13-Dec-2011
174	US 8078927 B2 patent document	Wrapper leads gating TAP instruction and data registers In a first embodiment a TAP 318 of IEEE standard 1149.1 is allowed to commandeer control from a WSP 202 of IEEE standard P1500 such that the P1500 architecture, normally controlled by the WSP, is rendered...	13-Dec-2011
175	US 8078898 B2 patent document	Synchronizing TAP controllers with sequence on TMS lead A method comprises a system comprising a host device coupled to a first remote device actively operating according to a state diagram that the host device and all remote devices follow during operation of the...	13-Dec-2011
176	US 8078897 B2 patent document	Power management in federated/distributed shared memory architecture This invention is a power management scheme for a shared memory multiprocessor system which splits the control logic between the master-specific logic and memory bank logic. Power-down is initiated from a...	13-Dec-2011
177	US 2011/0300677 A1 patent application	Novel Method to Enhance Channel Stress in CMOS Processes The invention provides a method of fabricating a semiconductor device that enhances the amount of stress that is transmitted to the channel region for carrier mobility enhancement. In one embodiment an...	08-Dec-2011
178	US 2011/0300666 A1 patent application	Photodiode semiconductor device and manufacturing method The invention provides a semiconductor device manufactured with a plurality of photodiodes so that it does not short circuit, and includes an opening without leakage. A second semiconductor layer (12, 16) of...	08-Dec-2011
179	US 2011/0298488 A1 patent application	Through carrier dual side loop-back testing of tsv die after die attach to substrate A method of testing electronic assemblies including singulated TSV die attached to a ML package substrate, on a substrate carrier. The substrate carrier includes through-holes for allowing probe contact to the...	08-Dec-2011
180	US 2011/0299301 A1 patent application	Fixed-frequency llc resonant power regulator An LLC resonant AC/DC power regulator system (10) includes a transformer (20) comprising a primary inductor and a secondary inductor. An LLC resonant tank (18) is configured to have first and second resonant...	08-Dec-2011
181	US 2011/0298842 A1 patent application	Sparse Source Array for Display Pixel Array Illumination with Rotated Far Field Plane A pixel array display system including an illumination source of discrete emitters with uniform emitting areas, a separate collimator in front of each emitter, and a condenser in front of said collimators which...	08-Dec-2011
182	US 2011/0301947 A1 patent application	Systems, processes and integrated circuits for rate and/Or diversity adaptation for packet communications Packets of real-time information are sent with a source rate greater than zero kilobits per second, and a time or path or combined time/path diversity rate initially being zero kilobits per second. This results...	08-Dec-2011
183	US 2011/0297088 A1 patent application	Thin edge carrier ring A PECVD deposition chamber with a circular pedestal with a recessed portion in the outer top surface of the pedestal. A PECVD deposition chamber with a circular wafer carrier ring with a recessed portion in the...	08-Dec-2011
184	US 2011/0298092 A1 patent application	Diodes with a dog bone or cap-shaped junction profile to enhance esd performance, and other substructures, integrated circuits and processes of manufacture and testing An integrated circuit structure includes a semiconductor doped area (NWell) having a first conductivity type, and a layer (PSD) that overlies a portion of said doped area (NWell) and has a doping of an opposite...	08-Dec-2011
185	US 2011/0300673 A1 patent application	Post-dispense vacuum oven for reducing underfill voids during ic assembly An IC assembly method for reducing voids in underfill material. An IC die is bonded to a substrate which creates a gap between the IC die and the substrate. An underfill material that has a curing temperature...	08-Dec-2011
186	US 2011/0299349 A1 patent application	Margin Testing of Static Random Access Memory Cells A static random access memory (SRAM) and method of evaluating the same for cell stability, write margin, and read current margin. The memory is constructed so that bit line precharge can be disabled, and so...	08-Dec-2011
187	US 8072262 B1 patent document	Low input bias current chopping switch circuit and method A chopper-stabilized circuit (1) includes pre-chopping circuitry (26) for chopping an input signal (Vin) at a first frequency to generate a first signal. Input chopping circuitry (9) chops the first signal at a...	06-Dec-2011
188	US 8072918 B2 patent document	Network-based inter-cell power control for multi-channel wireless networks A method is described for operating a cellular network, where the cellular network uses a plurality of frequency division multiplexing (FDM) bands for wireless communication from user equipment (UE) to a base...	06-Dec-2011
189	US 8073684 B2 patent document	Apparatus and method for automatic classification/identification of similar compressed audio files An audio file is divided into frames in the time domain and each frame is compressed, according to a psycho-acoustic algorithm, into file in the frequency domain. Each frame is divided into sub-bands and each...	06-Dec-2011
190	US 8071430 B2 patent document	Stress buffer layer for ferroelectric random access memory An F-RAM package having a semiconductor die containing F-RAM circuitry, a mold compound, and a stress buffer layer that is at least partially located between the semiconductor die and the mold compound. Also, a...	06-Dec-2011
191	US 8072770 B2 patent document	Semiconductor package with a mold material encapsulating a chip and a portion of a lead frame Various exemplary embodiments provide components, devices, and methods of semiconductor packaging. The disclosed packaging component can include a mold material disposed around a lead frame and at least an...	06-Dec-2011
192	US 8073074 B2 patent document	System and method for power control in a wireless transmitter A power control loop includes a feed forward unit 301 coupled to a data source, the feed forward unit 301 processes a signal for transmission, a feedback unit 302 coupled to the feed forward unit 301, the...	06-Dec-2011
193	US 2011/0291753 A1 patent application	Segmented Linear FM Power Amplifier Various apparatuses and methods for amplifying an FM signal in a segmented linear power amplifier are disclosed herein. For example, some embodiments provide an apparatus including a signal input, a signal...	01-Dec-2011
194	US 2011/0292699 A1 patent application	Systems and Methods for Distortion Reduction Systems and devices for reduction of total harmonic distortion in power supply circuits are presented. Example embodiments of the disclosed systems of total harmonic distortion reduction reduce a low frequency...	01-Dec-2011
195	US 2011/0294305 A1 patent application	Antireflective Coating Device and method for an antireflective coating to improve image quality in an image display system. A preferred embodiment comprises a first high refractive index layer overlying a reflective surface of an...	01-Dec-2011
196	US 2011/0291754 A1 patent application	Segmented Power Amplifier with Varying Segment Activation Various apparatuses and methods for varying segment activation in a segmented power amplifier are disclosed herein. For example, some embodiments provide a power amplifier including an input, an output, a...	01-Dec-2011
197	US 2011/0292514 A1 patent application	Color light combiner For combining light from different light sources that are spatially apart, an optical system comprises a prism assembly that comprises a totally-internally-surface and a dichroic filter. The...	01-Dec-2011
198	US 2011/0296263 A1 patent application	Semiconductor test system and method A test controller applies test stimulus signals to the input pads of plural die on a wafer in parallel. The test controller also applies encoded test response signals to the output pads of the plural die in...	01-Dec-2011
199	US 2011/0294246 A1 patent application	Silicon dioxide cantilever support and method for silicon etched structures An apparatus includes a semiconductor layer (2) having therein a cavity (4). A dielectric layer (3) is formed on the semiconductor layer. A plurality of etchant openings (24) extend through the dielectric layer...	01-Dec-2011
200	US 2011/0291222 A1 patent application	Silicon dioxide cantilever support and method for silicon etched structures An apparatus includes a semiconductor layer (2) having therein a cavity (4). A dielectric layer (3) is formed on the semiconductor layer. A plurality of etchant openings (24) extend through the dielectric layer...	01-Dec-2011

Showing 101-200 of 24645 results

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