Texas Instruments

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No	Document	Title	Date
401	US 8039955 B2 patent document	Mold lock on heat spreader A mold lock and a method of forming the mold lock are provided. The mold lock is used in an encapsulated semiconductor device and includes a neck and a shaped head integral with the neck. The mold lock can be...	18-Oct-2011
402	US 8039320 B2 patent document	Optimized circuit design layout for high performance ball grid array packages A method of laying out traces for connection of bond pads of a semiconductor chip to a printed wiring board or the like and the layout. There is provided a substrate having top and bottom surfaces with a...	18-Oct-2011
403	US 8039317 B2 patent document	Aluminum leadframes for semiconductor QFN/SON devices A post-mold plated semiconductor device has an aluminum leadframe (105) with a structure including a chip mount pad and a plurality of lead segments without cantilevered lead portions. A semiconductor chip...	18-Oct-2011
404	US 8039956 B2 patent document	High current semiconductor device system having low resistance and inductance A high current semiconductor device (for example QFN for 30 to 70 A) with low resistance and low inductance is encapsulated by molding compound (401, height 402 about 0.9 mm) so that the second lead surfaces...	18-Oct-2011
405	US 8040973 B2 patent document	Transmitter including pre-distortion The present invention relates to pre-distortion in transmitter circuits and provides a circuit for introducing pre-distortion into the output of a transmitter, wherein said pre-distortion comprises a...	18-Oct-2011
406	US 8040959 B2 patent document	Dynamic resource allocation to improve MIMO detection performance A method and apparatus for detecting symbols in a Multiple-Input Multiple-Output Orthogonal Frequency Division Multiplexing (“MIMO-OFDM”) system. A MIMO-OFDM receiver includes a first detector that estimates a...	18-Oct-2011
407	US 8039309 B2 patent document	Systems and methods for post-circuitization assembly A method of making integrated circuit packages using a conductive plate as a substrate includes forming a partial circuit pattern on one side of the conductive plate by stamping or selectively removing a...	18-Oct-2011
408	US 8040171 B2 patent document	Accelerator output stage that adjusts drive duration to loading The accelerator output stage circuit includes: a high side output device coupled to an output node; a low side output device coupled to the output node; a first logic gate coupled to a control node of the first...	18-Oct-2011
409	US 8040627 B2 patent document	Methods and apparatus for generating a hard drive write signal Methods and apparatus for generating a hard drive write signal are here in disclosed. A disclosed method comprises generating a hard drive write signal on an output of a switch based on an edge of the first...	18-Oct-2011
410	US 8040652 B2 patent document	Programmable power distribution switches with two-level current sensing Programmable power distribution switches with two-level current sensing are disclosed. In a particular example, a power distribution switch includes a programmable output device having a resistance based on a...	18-Oct-2011
411	US 8041982 B2 patent document	Real time clock Various apparatuses, methods and systems for a real time clock are disclosed herein. For example, some embodiments provide a real time clock including a clock generator having a first input connected to a clock...	18-Oct-2011
412	US 8039385 B1 patent document	IC devices having TSVS including protruding tips having IMC blocking tip ends A through substrate via (TSV) die includes a plurality of TSVs including an outer dielectric sleeve and an inner metal core and protruding TSV tips including sidewalls that emerge from the TSV die. A...	18-Oct-2011
413	US 8040019 B2 patent document	Driver and driving method Conventional drivers for transducers oftentimes did not provide an efficient driving mechanism because the driving signal was not “close enough” to the natural frequency of the transducer. Here, a driver for a...	18-Oct-2011
414	US 8040116 B2 patent document	Automatically configurable dual regulator type circuits and methods Automatically configurable dual regulator type circuits and methods are provided. On embodiment of the invention includes an automatically configurable dual regulator type circuit. The circuit comprises a...	18-Oct-2011
415	US 8040305 B2 patent document	Constant-weight bit-slice PWM method and system for scrolling color display systems A display system 100 includes a light source 110 and a color wheel 114. An optical section 112 is arranged to receive light from the light source 110 and to direct the light toward a color wheel 114. A digital...	18-Oct-2011
416	US 8041999 B2 patent document	Effecting adapter commands upon sequential target system TAP states A method comprises performing at least one zero-bit scan across an interface. The at least one zero-bit scan defines a command window. Further, the method implements one of a selectable plurality of control...	18-Oct-2011
417	US 2011/0248392 A1 patent application	Ball-Grid Array Device Having Chip Assembled on Half-Etched metal Leadframe A ball grid array device (100) based on a metallic leadframe (110) that has the footprint of a BGA package with terminals (112) in a full two-dimensional array, and combines the structure of a leadframe with...	13-Oct-2011
418	US 2011/0250720 A1 patent application	Thru silicon enabled die stacking scheme A die to die bonding system and method includes an upper die having a front side, a back side, and a fully filled thru silicon via, a portion of the fully filled thru silicon via protruding from the back side...	13-Oct-2011
419	US 2011/0248347 A1 patent application	Low cost transistors using gate orientation and optimized implants An integrated circuit is disclosed having symmetric and asymmetric MOS transistors of the same polarity, oriented perpendicularly to each other, formed by concurrent halo ion, LDD ion and/or S/D ion implant...	13-Oct-2011
420	US 2011/0252293 A1 patent application	Concatenated Coding Architecture for G.hnem PHY Embodiments provide a method for determining the number of parity bytes that are added by a Reed-Solomon encoder. The number of parity bytes are equivalent to the error correcting capability of the Reed-Solomon...	13-Oct-2011
421	US 8035995 B2 patent document	ACDC converter This invention relates to an ACDC converter (1) comprising a converter input (3) and a converter output (5), a pre-regulation stage (7) and a DC transformer stage (9) comprising a transformer input stage (11)...	11-Oct-2011
422	US 8036394 B1 patent document	Audio bandwidth expansion Bandwidth expansion for audio signals by frequency band translations plus adaptive gains to create higher frequencies; use of a common channel for both stereo channels limits computational complexity. Adaptive...	11-Oct-2011
423	US 8036522 B2 patent document	Method and system for auto-focusing Method and system for auto-focusing. The method includes checking for presence of a subject in a first frame. The method also includes determining a second frame indicative of an in-focus position of the...	11-Oct-2011
424	US 8037383 B2 patent document	Gating circuitry coupling selected scan paths between I/O scan bus A scan test architecture facilitates low power testing of semiconductor circuits by selectively dividing the serial scan paths into shorter sections. Multiplexers between the sections control connecting the...	11-Oct-2011
425	US 8033001 B2 patent document	CVD showerhead alignment apparatus A method and apparatus for aligning a CVD showerhead, comprising engaging a showerhead stem clamp with a showerhead stem outside of a process chamber of the CVD system. An alignment fixture is provided, and a...	11-Oct-2011
426	US 8035311 B2 patent document	Light-emitting semiconductor device driver and method An electronic device includes circuitry for driving a light-emitting diode (LED) or other light-emitting semiconductor device. The circuitry includes a first switch (NM5) coupled with the light-emitting...	11-Oct-2011
427	US 8035407 B2 patent document	Bist DDR memory interface circuit and method for testing the same An apparatus and method for self-testing a DDR memory interface are disclosed. In one aspect, a built-in-self-test (BIST) memory interface circuit includes a signal multiplier for receiving a first clock signal...	11-Oct-2011
428	US 8036703 B2 patent document	Image capture reporting based on content-associated wireless identification An electronic device. The device comprises circuitry for capturing data representing an image and circuitry for detecting a wireless signal associated with an object. The device also comprises circuitry,...	11-Oct-2011
429	US 8037355 B2 patent document	Powering up adapter and scan test logic TAP controllers A method comprises a system comprising a host device coupled to a first remote device actively operating according to a state diagram that the host device and all remote devices follow during operation of the...	11-Oct-2011
430	US 8034660 B2 patent document	PoP precursor with interposer for top package bond pad pitch compensation An electronic assembly adapted for forming package on package (PoP) devices includes a package substrate having a molded IC die thereon that defines a mold cap height and substrate contact pads lateral to the...	11-Oct-2011
431	US 8035440 B2 patent document	Multistage charge pumps with diode loss compensation Multistage charge pumps with diode loss compensation are disclosed. In one example, a pre-regulated charge pump to generate a voltage is described. The example pre-regulated charge pump includes a charge pump...	11-Oct-2011
432	US 8037386 B2 patent document	TAP with select output from one of IR and DR A TAP linking module (21, 51) permits plural TAPs (TAPs 1-4) to be controlled and accessed from a test bus (13) via a single TAP interface (20).	11-Oct-2011
433	US 2011/0241155 A1 patent application	Semiconductor thermocouple and sensor Conventional “on-chip” or monolithically integrated thermocouples are very mechanically sensitive and are expensive to manufacture. Here, however, thermocouples are provided that employ different thicknesses of...	06-Oct-2011
434	US 2011/0241771 A1 patent application	Active mute scheme for an amplifier Conventional muting circuitry for amplifiers (which usually uses clamps) generally has about 20-30 dB of attenuation. Here, an integrated circuit or IC is provided that includes an amplifier, switch networks,...	06-Oct-2011
435	US 2011/0243079 A1 patent application	Transmission Modes and Signaling for Uplink MIMO Support or Single TB Dual-Layer Transmission in LTE Uplink This invention is a method of wireless telephony. A bases station configures a user equipment for single-antenna port or multi-antenna port operation via Radio Resource Control (RRC) signaling including a 5-bit...	06-Oct-2011
436	US 2011/0241633 A1 patent application	Switching converter control circuit A DC-DC converter has a control circuit for controlling a high-side power transistor and a low-side power transistor connected in series between supply terminals to which an input supply voltage is applied. The...	06-Oct-2011
437	US 2011/0243206 A1 patent application	Power back-off mode and circuit for 100baset Generally, 100BaseT allows for the establishment of links on cables (such as Category 5 or CATS cables) up to 120 m or more in length. In a given industrial Ethernet system, many of the cables deployed will be...	06-Oct-2011
438	US 2011/0243009 A1 patent application	Physical Downlink Shared Channel Muting on Cell-Specific Reference Symbols Locations for of Non-Serving Cells The primary serving base station transmits PDSCH with zero energy on the inter-cell CRS resource element location. This is called mute PDSCH. Within the first Physical Resource Block (PRB 0), the RE positions...	06-Oct-2011
439	US 2011/0242879 A1 patent application	Two word line sram cell with strong-side word line boost for write provided by weak-side word line An integrated circuit having a static random access memory (SRAM) includes an array of SRAM cells arranged in rows and columns having a write word line and a read/write word line connected to provide row access...	06-Oct-2011
440	US 8032813 B2 patent document	Concurrent production of CRC syndromes for different data blocks in an input data sequence Cyclic redundancy check (CRC) processing is applied to a received sequence of data blocks that are defined by respective sequences of sets of parallel data. For each data block, there is produced a sequence of...	04-Oct-2011
441	US 8031265 B2 patent document	System and method for combining interlaced video frames System and method for combining interlaced video frames. A method embodiment for displaying a de-interlaced video sequence includes receiving a video stream, decoding the video stream to produce a sequence of...	04-Oct-2011
442	US 8028709 B2 patent document	Photoresist dispenser with nozzle arrangement for cone-shaped spray A cleaning system which can be integrated into a coater track system for use in the production of semiconductor devices and methods for its use are provided. The cleaning system can include a series of nozzles...	04-Oct-2011
443	US 8030155 B2 patent document	Schottky diode with minimal vertical current flow A method of forming a rectifying diode. The method comprises providing a first semiconductor region of a first conductivity type and having a first dopant concentration and forming a second semiconductor region...	04-Oct-2011
444	US 8030980 B2 patent document	Simplified, extendable, edge-based watchdog for DLL A delay locked loop (DLL) is provided. Within this DLL is a watchdog circuit that determines whether harmonic lock is present. Based on this measurement, the watchdog circuit can provide adjustments to the DLL...	04-Oct-2011
445	US 8031390 B2 patent document	Illumination source and method therefor An illumination source and a method therefor. A light source includes a light circuit configured to process light and direct light, and a lighting element optically coupled to the light circuit to provide...	04-Oct-2011
446	US 8031391 B2 patent document	System and method for operating light processing electronic devices A system and method for operating an electronic device used in light processing. A method comprises altering a spatial relationship between a spatial light modulator (SLM) and a light incident on the SLM,...	04-Oct-2011
447	US 8031403 B2 patent document	System and method for reducing visible speckle in a projection visual display system The invention provides an apparatus for reducing speckle in a projection visual display (PVD) system, a method of reducing visible speckle in a PVD system and a PVD system incorporating the method or apparatus....	04-Oct-2011
448	US 8031946 B2 patent document	Reduced calculations in determining intra-prediction type method and system The method, system, and apparatus of source statistics based intra prediction type is disclosed. In one embodiment, a method includes classifying a four-pixel square block in an edge class (e.g., may include a...	04-Oct-2011
449	US 8030959 B2 patent document	Device-under-test power management One embodiment of the present invention includes a system for managing power to a plurality of devices-under-test (DUTs). The system comprises a DUT test system configured to perform at least one test...	04-Oct-2011
450	US 8032764 B2 patent document	Electronic devices, information products, processes of manufacture and apparatus for enabling code decryption in a secure mode using decryption wrappers and key programming applications, and other structures An electronic device (1640) includes a non-volatile store (1620) holding a plurality of encrypted sub-applications (SubApp n), and application-specific identifications (ASIDs) to respectively identify the...	04-Oct-2011
451	US 8030137 B2 patent document	Flexible interposer for stacking semiconductor chips and connecting same to substrate A semiconductor device with a first (101) and a second (111) semiconductor chip assembled on an insulating flexible interposer (120). The interposer, preferably about 25 to 50 μm thick, has conductive traces...	04-Oct-2011
452	US 8030909 B2 patent document	Method and apparatus for switching a synchronous DC/DC converter between a PWM mode of operation and a light-load mode of operation A synchronous buck converter operates in a PWM mode of operation and switches to light-load mode of operation under a light-load condition. When operating in the light-load mode, the synchronous buck converter...	04-Oct-2011
453	US 8032891 B2 patent document	Energy-aware scheduling of application execution A mobile device (10) manages tasks (18) using a scheduler (20) for scheduling tasks on multiple processors (12). To conserve energy, the set of tasks to be scheduled are divided into two (or more) subsets,...	04-Oct-2011
454	US 8031745 B2 patent document	Downlink synchronization channel and methods for cellular systems The present invention provides a method of operating a base station transmitter. The method includes providing a cellular downlink synchronization signal having primary and secondary portions, wherein the...	04-Oct-2011
455	US 8032762 B2 patent document	Process, circuits, devices, and systems for encryption and decryption and other purposes, and process making A wireless communications device (110) has a digital section (800) and a radio frequency section (840). The digital section (800) does setup and execution on a set of data in at least first and second threads...	04-Oct-2011
456	US 2011/0234534 A1 patent application	Capacitance measurement system and method A capacitance measurement system precharges first terminals (21-0 . . . 21-k . . . 21-n) of a plurality of capacitors (25-0 . . . 25-k . . . 25), respectively, of a CDAC (capacitor digital-to-analog converter)...	29-Sep-2011
457	US 2011/0239068 A1 patent application	Tam with scan frame copy register coupled with serial output Testing of an electrical device is achieved by providing a test access mechanism within the device that can receive scan frames from an external tester. The received scan frames contain stimulus data to be...	29-Sep-2011
458	US 2011/0235600 A1 patent application	Method and system for using resources allocated to a wireless network in a coexisting wireless network A wireless device includes a first wireless transceiver and a second wireless transceiver. The first wireless transceiver is configured to communicate via a first wireless network, and includes a first...	29-Sep-2011
459	US 2011/0239066 A1 patent application	Removable and replaceable tap domain selection circuitry Today many instances of IEEE 1149.1 Tap domains are included in integrated circuits (ICs). While all TAP domains may be serially connected on a scan path that is accessible external to the IC, it is generally...	29-Sep-2011
460	US 2011/0235706 A1 patent application	Region of interest (Roi) video encoding A method of encoding an image frame in a video encoding system. The image frame has a region of interest (ROI) and a non region of interest (non-ROI). In the method, quantization scale for the image frame based...	29-Sep-2011
461	US 2011/0234312 A1 patent application	Amplifier with improved stability A circuit includes an amplifier that defines a positive input terminal, a negative input terminal, a positive output terminal and a negative output terminal. The circuit also includes a first positive feedback...	29-Sep-2011
462	US 8027657 B2 patent document	Sampling mixer with asynchronous clock and signal domains A mixer 1100 with a plurality of signal paths typically requires separate clock generating hardware for each signal path. However, the redundancy of having multiple clock generating hardware significantly...	27-Sep-2011
463	US 8028212 B2 patent document	Parallel scan paths with header data circuitry and header return circuitry Testing of integrated circuits is achieved by a test architecture utilizing a scan frame input shift register, a scan frame output shift register, a test controller, and a test interface comprising a scan...	27-Sep-2011
464	US 8026507 B2 patent document	Two terminal quantum device using MOS capacitor structure A gated quantum well device formed as an MOS capacitor is disclosed. The quantum well is an inversion region less than 20 nanometers wide under the MOS gate. The device may be fabricated in either polarity, and...	27-Sep-2011
465	US 8026135 B2 patent document	Formation of shallow junctions by diffusion from a dielectric doped by cluster or molecular ion beams A process for forming diffused region less than 20 nanometers deep with an average doping dose above 1014 cm−2 in an IC substrate, particularly LDD region in an MOS transistor, is disclosed. Dopants are...	27-Sep-2011
466	US 8026177 B2 patent document	Silicon dioxide cantilever support and method for silicon etched structures A semiconductor device includes a semiconductor layer (2) having therein a cavity (4). A dielectric layer (3) is formed on the semiconductor layer. A plurality of etchant openings (24) extend through the...	27-Sep-2011
467	US 8026680 B2 patent document	Methods and apparatus to reduce the stopping time of spindle motors Methods and apparatus to reduce the stopping time of a spindle motor are disclosed. An example method includes detecting a dissipation current flowing in a spinning motor; determining when the dissipation...	27-Sep-2011
468	US 8027108 B2 patent document	System and method for projection systems using sequential color techniques A projection system using a sequential color filter is provided. The sequential color filter utilizes various colors, such as red, blue, and green, divided into segments to produce images. Each color may be...	27-Sep-2011
469	US 2011/0227615 A1 patent application	Pll with continuous and bang-bang feedback controls Phase locked loops (PLLs) are commonly employed in synthesizers, and there is ever increasing pressure to build PLLs that have better performance using low cost and low voltage digital complementary metal oxide...	22-Sep-2011
470	US 2011/0227233 A1 patent application	Packaged Electronic Device Having Metal Comprising Self-Healing Die Attach Material A method of assembling an electronic device and electronic packages therefrom. A die attach adhesive precursor is placed between a top surface of a workpiece and an IC die. The die attach adhesive precursor...	22-Sep-2011
471	US 2011/0231736 A1 patent application	Low-Power Redundancy for Non-Volatile Memory A static RAM redundancy memory for use in combination with a non-volatile memory array, such as ferroelectric RAM (FRAM), in which the power consumption of the SRAM redundancy memory is reduced. Each word of...	22-Sep-2011
472	US 2011/0226732 A1 patent application	Reducing Adherence in a MEMS Device In one embodiment, an apparatus for reducing adherence in a micro-electromechanical system (MEMS) device comprises a substrate. A MEMS is disposed outwardly from the substrate. The MEMS comprises structures and...	22-Sep-2011
473	US 2011/0227227 A1 patent application	Integrated circuit having tsvs including hillock suppression A method for fabricating integrated circuit (ICs) having through substrate vias (TSVs) includes forming active circuit elements on a semiconductor wafer and then forming a plurality of embedded vias through the...	22-Sep-2011
474	US 2011/0231932 A1 patent application	Security intrusion detection and response A system comprises an enclosure, host logic contained in the enclosure, and intrusion security logic also contained in the enclosure. The intrusion security logic is coupled to the host logic and configured to...	22-Sep-2011
475	US 2011/0227555 A1 patent application	Buffer for temperature compensated crystal oscillator signals A buffer is provided. The buffer includes a buffering stage that receives an enable signal and an input signal and that provides an output signal and a bandgap stage that is coupled to the buffering stage and...	22-Sep-2011
476	US 2011/0227543 A1 patent application	Converter and method for extracting maximum power from piezo vibration harvester A system (1-2) for efficiently transferring harvested vibration energy to a battery (6) includes a piezo harvester (2) generating an AC output voltage (VP(t)) and current (IPZ(t)) and an active rectifier (3) to...	22-Sep-2011
477	US 8024554 B2 patent document	Modifying an instruction stream using one or more bits to replace an instruction or to replace an instruction and to subsequently execute the replaced instruction A processor comprising fetch logic adapted to fetch instructions from memory and decode logic coupled to the fetch logic and adapted to decode the fetched instructions. If a bit in the decode logic is in a...	20-Sep-2011
478	US 8023577 B2 patent document	Systems and methods for efficient channel classification Embodiments provide a system and method for efficiently classifying different channel types in an orthogonal frequency division multiplexing (OFDM) system. Embodiments quantify the frequency selectivity in a...	20-Sep-2011
479	US 8024716 B2 patent document	Method and apparatus for code optimization A system comprising a compiler that compiles source-level code to generate an intermediate-level instruction comprising a predetermined component. The intermediate-level instruction is an at least partially...	20-Sep-2011
480	US 8021990 B2 patent document	Gate structure and method A MOSFET structure including silicate gate dielectrics with nitridation treatments of the gate dielectric prior to gate material deposition.	20-Sep-2011
481	US 8022778 B2 patent document	Low phase noise frequency synthesizer Various apparatuses and methods for a low phase noise frequency synthesizer are disclosed herein. For example, some embodiments provide an oscillator that may be used in a low phase noise frequency synthesizer....	20-Sep-2011
482	US 8023359 B2 patent document	System and method for converting scan data An ultrasound device generates polar-coordinate image data divided up into an (N×M) array of polar-coordinate image data blocks; a first external memory configured to store the (N×M) array of data blocks; a...	20-Sep-2011
483	US 8023919 B2 patent document	Receiver dynamically switching to pseudo differential mode for SOC spur reduction A low noise amplifier in an integrated circuit, the circuit having a digital portion and an analog portion on a common substrate, the digital portion having at least one clocking frequency, includes an input...	20-Sep-2011
484	US 8023589 B2 patent document	Wireless MIMO transmitter with antenna and tone precoding blocks Various wireless precoding systems and methods are presented. In some embodiments, a wireless transmitter comprises an antenna precoding block, a transform block, and multiple transmit antennas. The antenna...	20-Sep-2011
485	US 8024182 B2 patent document	Rate/diversity adaptation sending speech in first and second packets Packets of real-time information are sent with a source rate greater than zero kilobits per second, and a time or path or combined time/path diversity rate initially being zero kilobits per second. This results...	20-Sep-2011
486	US 8022686 B2 patent document	Reference circuit with reduced current startup An apparatus is provided. The apparatus comprises a reference circuit and a startup circuit. The reference circuit is adapted to provide a startup current, while the startup circuit receives the startup current...	20-Sep-2011
487	US 2011/0222409 A1 patent application	System and method for use of reserved medium in coexisting wireless networks A system and method for using reserved resources in coexisting wireless networks. In one embodiment, a wireless apparatus includes a receiver, a network activity monitor, and a network access scheduler. The...	15-Sep-2011
488	US 2011/0223754 A1 patent application	Integration Scheme for Dual Work Function Metal Gates A transistor includes a semiconductor substrate includes having a gate hardmask over the gate electrode layer during the formation of transistor source/drain regions. An independent work function adjustment...	15-Sep-2011
489	US 2011/0225305 A1 patent application	System and method for determining group owner intent A system comprising a first wireless device which comprises a first group owner intent determination unit. The first group owner intent determination unit is configured to determine a group owner intent value...	15-Sep-2011
490	US 2011/0225475 A1 patent application	Low overhead and timing improved architecture for performing error checking and correction for memories and buses in system-on-chips, and other circuits, systems and processes An electronic circuit (200) for use with an accessing circuit (110) that supplies a given address and a partial write data portion and also has dummy cycles. The electronic circuit (200) includes a memory...	15-Sep-2011
491	US 2011/0225456 A1 patent application	Commanded jtag test access port operations The disclosure describes a novel method and apparatus for improving the operation of a TAP architecture in a device through the use of Command signal inputs to the TAP architecture. In response to a Command...	15-Sep-2011
492	US 2011/0221515 A1 patent application	Body bias coordinator, method of coordinating a body bias and sub-circuit power supply employing the same A body bias coordinator is provided for use with a transistor employing a body region. In one example, the body bias coordinator includes a control unit configured to control the transistor and make it operable...	15-Sep-2011
493	US 2011/0223757 A1 patent application	Work function adjustment with the implant of lanthanides Semiconductor devices and fabrication methods are provided, in which fully silicided gates are provided. A lanthanide series metal is implanted into the gate electrode layer prior to silicidation and diffuses...	15-Sep-2011
494	US 2011/0221416 A1 patent application	Battery charger and method for collecting maximum power from energy harvester circuit An energy harvesting system for transferring energy from an energy harvester (2) having an output impedance (Zi) to a DC-DC converter (10) includes a maximum power point tracking (MPPT) circuit (12) including a...	15-Sep-2011
495	US 2011/0222791 A1 patent application	Post-Beamformer Ultrasound Compression Embodiments of the invention compress ultrasound RF data after the receiver beamformer. An efficient compression algorithm is disclosed that incorporates the use of the Discrete Cosine Transform (DCT) and the...	15-Sep-2011
496	US 8019280 B2 patent document	System and method for avoiding interference in a dual-signal device A dual-signal wireless transceiver is provided, comprising: a first wireless transceiver circuit configured to transmit and receive first signals using a first protocol; a second wireless transceiver circuit...	13-Sep-2011
497	US 8019598 B2 patent document	Phase locking method for frequency domain time scale modification based on a bark-scale spectral partition This invention improves the perceived quality of frequency-domain time scale modification by selection of spectral bands used in phase locking based upon a Bark scale according to the variation in human hearing...	13-Sep-2011
498	US 8017935 B2 patent document	Parallel redundant single-electron device and method of manufacture A method of manufacturing a parallel redundant array of single-electron devices. The method includes (a) providing a mask for diffusing a plurality of n-doped regions defined by a first set of a plurality of...	13-Sep-2011
499	US 8018903 B2 patent document	Closed-loop transmit diversity scheme in frequency selective multipath channels Closed loop multiple-antenna wireless communications system with antenna weights determined by maximizing a composite channel signal-to-interference-plus-noise ratio minimum. Multiplexed symbol streams over...	13-Sep-2011
500	US 8017410 B2 patent document	Power semiconductor devices having integrated inductor An electronic device (100) with one or more semiconductor chips (102) has an inductor (101) assembled on or under the chips. The inductor includes a ferromagnetic body (111) and a wire (104) wrapped around the...	13-Sep-2011

Showing 401-500 of 24645 results

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